xref: /llvm-project/llvm/test/Transforms/InstCombine/PR37526.ll (revision 211cf8a384ebb29787367c8fd5858e2a5ed3c10f)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes=instcombine -S < %s | FileCheck %s
3
4define void @PR37526(ptr %pz, ptr %px, ptr %py) {
5; CHECK-LABEL: @PR37526(
6; CHECK-NEXT:    [[T2:%.*]] = load i32, ptr [[PY:%.*]], align 4
7; CHECK-NEXT:    [[T3:%.*]] = load i32, ptr [[PX:%.*]], align 4
8; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[T2]], [[T3]]
9; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[CMP]], ptr [[PX]], ptr [[PY]]
10; CHECK-NEXT:    [[R:%.*]] = load i64, ptr [[SELECT]], align 4
11; CHECK-NEXT:    store i64 [[R]], ptr [[PZ:%.*]], align 4
12; CHECK-NEXT:    ret void
13;
14  %t2 = load i32, ptr %py
15  %t3 = load i32, ptr %px
16  %cmp = icmp slt i32 %t2, %t3
17  %select = select i1 %cmp, ptr %px, ptr %py
18  %r = load i64, ptr %select
19  store i64 %r, ptr %pz
20  ret void
21}
22