xref: /llvm-project/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-tbl-dupx.ll (revision acdc419c897f8a9414c7a00c8908ac32312afee2) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -passes=instcombine < %s | FileCheck %s
3
4target triple = "aarch64-unknown-linux-gnu"
5
6; op2 = tbl(op1 dup_x(idx)) -> op2 = vector_splat(extractelement(op1, idx))
7
8define <vscale x 16 x i8> @dup_ext_i8(<vscale x 16 x i8> %data) #0 {
9;
10; CHECK-LABEL: @dup_ext_i8(
11; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <vscale x 16 x i8> [[DATA:%.*]], i64 1
12; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[TMP1]], i64 0
13; CHECK-NEXT:    [[OUT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
14; CHECK-NEXT:    ret <vscale x 16 x i8> [[OUT]]
15;
16  %tmp = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 1)
17  %out = call <vscale x 16 x i8> @llvm.aarch64.sve.tbl.nxv16i8(<vscale x 16 x i8>  %data, <vscale x 16 x i8> %tmp)
18  ret <vscale x 16 x i8> %out
19}
20
21define <vscale x 8 x i16> @dup_ext_i16(<vscale x 8 x i16> %data) #0 {
22;
23; CHECK-LABEL: @dup_ext_i16(
24; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <vscale x 8 x i16> [[DATA:%.*]], i64 1
25; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[TMP1]], i64 0
26; CHECK-NEXT:    [[OUT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
27; CHECK-NEXT:    ret <vscale x 8 x i16> [[OUT]]
28;
29  %tmp = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 1)
30  %out = call <vscale x 8 x i16> @llvm.aarch64.sve.tbl.nxv8i16(<vscale x 8 x i16>  %data, <vscale x 8 x i16> %tmp)
31  ret <vscale x 8 x i16> %out
32}
33
34define <vscale x 4 x i32> @dup_ext_i32(<vscale x 4 x i32> %data) #0 {
35;
36; CHECK-LABEL: @dup_ext_i32(
37; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <vscale x 4 x i32> [[DATA:%.*]], i64 1
38; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[TMP1]], i64 0
39; CHECK-NEXT:    [[OUT:%.*]] = shufflevector <vscale x 4 x i32> [[DOTSPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
40; CHECK-NEXT:    ret <vscale x 4 x i32> [[OUT]]
41;
42  %tmp = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 1)
43  %out = call <vscale x 4 x i32> @llvm.aarch64.sve.tbl.nxv4i32(<vscale x 4 x i32>  %data, <vscale x 4 x i32> %tmp)
44  ret <vscale x 4 x i32> %out
45}
46
47define <vscale x 2 x i64> @dup_ext_i64(<vscale x 2 x i64> %data) #0 {
48;
49; CHECK-LABEL: @dup_ext_i64(
50; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <vscale x 2 x i64> [[DATA:%.*]], i64 1
51; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP1]], i64 0
52; CHECK-NEXT:    [[OUT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
53; CHECK-NEXT:    ret <vscale x 2 x i64> [[OUT]]
54;
55  %tmp = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 1)
56  %out = call <vscale x 2 x i64> @llvm.aarch64.sve.tbl.nxv2i64(<vscale x 2 x i64>  %data, <vscale x 2 x i64> %tmp)
57  ret <vscale x 2 x i64> %out
58}
59
60define <vscale x 8 x half> @dup_ext_f16(<vscale x 8 x half> %data) #0 {
61;
62; CHECK-LABEL: @dup_ext_f16(
63; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <vscale x 8 x half> [[DATA:%.*]], i64 1
64; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x half> poison, half [[TMP1]], i64 0
65; CHECK-NEXT:    [[OUT:%.*]] = shufflevector <vscale x 8 x half> [[DOTSPLATINSERT]], <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
66; CHECK-NEXT:    ret <vscale x 8 x half> [[OUT]]
67;
68  %tmp = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 1)
69  %out = call <vscale x 8 x half> @llvm.aarch64.sve.tbl.nxv8f16(<vscale x 8 x half>  %data, <vscale x 8 x i16> %tmp)
70  ret <vscale x 8 x half> %out
71}
72
73define <vscale x 4 x float> @dup_ext_f32(<vscale x 4 x float> %data) #0 {
74;
75; CHECK-LABEL: @dup_ext_f32(
76; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <vscale x 4 x float> [[DATA:%.*]], i64 1
77; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x float> poison, float [[TMP1]], i64 0
78; CHECK-NEXT:    [[OUT:%.*]] = shufflevector <vscale x 4 x float> [[DOTSPLATINSERT]], <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
79; CHECK-NEXT:    ret <vscale x 4 x float> [[OUT]]
80;
81  %tmp = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 1)
82  %out = call <vscale x 4 x float> @llvm.aarch64.sve.tbl.nxv4f32(<vscale x 4 x float>  %data, <vscale x 4 x i32> %tmp)
83  ret <vscale x 4 x float> %out
84}
85
86define <vscale x 2 x double> @dup_ext_f64(<vscale x 2 x double> %data) #0 {
87;
88; CHECK-LABEL: @dup_ext_f64(
89; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <vscale x 2 x double> [[DATA:%.*]], i64 1
90; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x double> poison, double [[TMP1]], i64 0
91; CHECK-NEXT:    [[OUT:%.*]] = shufflevector <vscale x 2 x double> [[DOTSPLATINSERT]], <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
92; CHECK-NEXT:    ret <vscale x 2 x double> [[OUT]]
93;
94  %tmp = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 1)
95  %out = call <vscale x 2 x double> @llvm.aarch64.sve.tbl.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x i64> %tmp)
96  ret <vscale x 2 x double> %out
97}
98
99declare <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8( i8)
100declare <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16)
101declare <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32)
102declare <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64)
103declare <vscale x 16 x i8> @llvm.aarch64.sve.tbl.nxv16i8( <vscale x 16 x i8>, <vscale x 16 x i8>)
104declare <vscale x 8 x i16> @llvm.aarch64.sve.tbl.nxv8i16( <vscale x 8 x i16>, <vscale x 8 x i16>)
105declare <vscale x 4 x i32> @llvm.aarch64.sve.tbl.nxv4i32( <vscale x 4 x i32>, <vscale x 4 x i32>)
106declare <vscale x 2 x i64> @llvm.aarch64.sve.tbl.nxv2i64( <vscale x 2 x i64>, <vscale x 2 x i64>)
107declare <vscale x 8 x half> @llvm.aarch64.sve.tbl.nxv8f16( <vscale x 8 x half>, <vscale x 8 x i16>)
108declare <vscale x 4 x float> @llvm.aarch64.sve.tbl.nxv4f32( <vscale x 4 x float>, <vscale x 4 x i32>)
109declare <vscale x 2 x double> @llvm.aarch64.sve.tbl.nxv2f64( <vscale x 2 x double>, <vscale x 2 x i64>)
110
111attributes #0 = { "target-features"="+sve" }
112