xref: /llvm-project/llvm/test/Transforms/InstCombine/2011-06-13-nsw-alloca.ll (revision 32a4566fbb43f7195fd51fbe453b980897cec3fc)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
2; RUN: opt -S -passes=instcombine < %s | FileCheck %s
3target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
4target triple = "i386-apple-darwin10.0.0"
5
6define void @fu1(i32 %parm) #0 {
7; CHECK-LABEL: define void @fu1
8; CHECK-SAME: (i32 [[PARM:%.*]]) #[[ATTR0:[0-9]+]] {
9; CHECK-NEXT:  bb:
10; CHECK-NEXT:    [[I:%.*]] = alloca i32, align 4
11; CHECK-NEXT:    [[PTR:%.*]] = alloca ptr, align 4
12; CHECK-NEXT:    store i32 [[PARM]], ptr [[I]], align 4
13; CHECK-NEXT:    store ptr null, ptr [[PTR]], align 4
14; CHECK-NEXT:    [[I2_NOT:%.*]] = icmp eq i32 [[PARM]], 0
15; CHECK-NEXT:    br i1 [[I2_NOT]], label [[BB9:%.*]], label [[BB3:%.*]]
16; CHECK:       bb3:
17; CHECK-NEXT:    [[I4:%.*]] = load i32, ptr [[I]], align 4
18; CHECK-NEXT:    [[I5:%.*]] = shl nuw i32 [[I4]], 3
19; CHECK-NEXT:    [[I6:%.*]] = add nuw i32 [[I5]], 2048
20; CHECK-NEXT:    [[I7:%.*]] = alloca i8, i32 [[I6]], align 1
21; CHECK-NEXT:    store ptr [[I7]], ptr [[PTR]], align 4
22; CHECK-NEXT:    br label [[BB9]]
23; CHECK:       bb9:
24; CHECK-NEXT:    [[I10:%.*]] = load ptr, ptr [[PTR]], align 4
25; CHECK-NEXT:    call void @bar(ptr [[I10]]) #[[ATTR1:[0-9]+]]
26; CHECK-NEXT:    ret void
27;
28bb:
29  %i = alloca i32, align 4
30
31  %ptr = alloca ptr, align 4
32  store i32 %parm, ptr %i, align 4
33  store ptr null, ptr %ptr, align 4
34  %i1 = load i32, ptr %i, align 4
35  %i2 = icmp ne i32 %i1, 0
36  br i1 %i2, label %bb3, label %bb9
37
38bb3:                                              ; preds = %bb
39  %i4 = load i32, ptr %i, align 4
40  %i5 = shl nuw i32 %i4, 3
41  ; With "nuw", the alloca and its bitcast can be fused:
42  %i6 = add nuw i32 %i5, 2048
43
44  %i7 = alloca i8, i32 %i6, align 1
45  store ptr %i7, ptr %ptr, align 4
46  br label %bb9
47
48bb9:                                              ; preds = %bb3, %bb
49  %i10 = load ptr, ptr %ptr, align 4
50  call void @bar(ptr %i10)
51  ret void
52}
53
54declare void @bar(ptr)
55
56define void @fu2(i32 %parm) #0 {
57; CHECK-LABEL: define void @fu2
58; CHECK-SAME: (i32 [[PARM:%.*]]) #[[ATTR0]] {
59; CHECK-NEXT:  bb:
60; CHECK-NEXT:    [[I:%.*]] = alloca i32, align 4
61; CHECK-NEXT:    [[PTR:%.*]] = alloca ptr, align 4
62; CHECK-NEXT:    store i32 [[PARM]], ptr [[I]], align 4
63; CHECK-NEXT:    store ptr null, ptr [[PTR]], align 4
64; CHECK-NEXT:    [[I2_NOT:%.*]] = icmp eq i32 [[PARM]], 0
65; CHECK-NEXT:    br i1 [[I2_NOT]], label [[BB9:%.*]], label [[BB3:%.*]]
66; CHECK:       bb3:
67; CHECK-NEXT:    [[I4:%.*]] = load i32, ptr [[I]], align 4
68; CHECK-NEXT:    [[I5:%.*]] = shl nuw i32 [[I4]], 3
69; CHECK-NEXT:    [[I6:%.*]] = add i32 [[I5]], 2048
70; CHECK-NEXT:    [[I7:%.*]] = alloca i8, i32 [[I6]], align 1
71; CHECK-NEXT:    store ptr [[I7]], ptr [[PTR]], align 4
72; CHECK-NEXT:    br label [[BB9]]
73; CHECK:       bb9:
74; CHECK-NEXT:    [[I10:%.*]] = load ptr, ptr [[PTR]], align 4
75; CHECK-NEXT:    call void @bar(ptr [[I10]]) #[[ATTR1]]
76; CHECK-NEXT:    ret void
77;
78bb:
79  %i = alloca i32, align 4
80  %ptr = alloca ptr, align 4
81  store i32 %parm, ptr %i, align 4
82  store ptr null, ptr %ptr, align 4
83  %i1 = load i32, ptr %i, align 4
84  %i2 = icmp ne i32 %i1, 0
85  br i1 %i2, label %bb3, label %bb9
86
87bb3:                                              ; preds = %bb
88  %i4 = load i32, ptr %i, align 4
89  %i5 = mul nuw i32 %i4, 8
90  ; Without "nuw", the alloca and its bitcast cannot be fused:
91  %i6 = add i32 %i5, 2048
92  %i7 = alloca i8, i32 %i6, align 1
93
94  store ptr %i7, ptr %ptr, align 4
95  br label %bb9
96
97bb9:                                              ; preds = %bb3, %bb
98  %i10 = load ptr, ptr %ptr, align 4
99  call void @bar(ptr %i10)
100  ret void
101}
102
103attributes #0 = { nounwind ssp }
104