xref: /llvm-project/llvm/test/Transforms/InstCombine/2009-06-16-SRemDemandedBits.ll (revision acdc419c897f8a9414c7a00c8908ac32312afee2)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=instcombine -S | FileCheck %s
3; PR3439
4
5define i32 @a(i32 %x) nounwind {
6; CHECK-LABEL: @a(
7; CHECK-NEXT:  entry:
8; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[X:%.*]], 2
9; CHECK-NEXT:    [[AND:%.*]] = and i32 [[REM]], 2
10; CHECK-NEXT:    ret i32 [[AND]]
11;
12entry:
13  %rem = srem i32 %x, 2
14  %and = and i32 %rem, 2
15  ret i32 %and
16}
17