xref: /llvm-project/llvm/test/Transforms/Inline/nested-inline.ll (revision 151602c7a9935558ca671b35359989b261045db0)
1; RUN: opt < %s -passes=inline -S | FileCheck %s
2; RUN: opt < %s -passes='cgscc(inline)' -S | FileCheck %s
3; RUN: opt < %s -passes='module-inline' -S | FileCheck %s
4; Test that bar and bar2 are both inlined throughout and removed.
5@A = weak global i32 0		; <ptr> [#uses=1]
6@B = weak global i32 0		; <ptr> [#uses=1]
7@C = weak global i32 0		; <ptr> [#uses=1]
8
9define fastcc void @foo(i32 %X) {
10entry:
11; CHECK-LABEL: @foo(
12	%ALL = alloca i32, align 4		; <ptr> [#uses=1]
13	%tmp1 = and i32 %X, 1		; <i32> [#uses=1]
14	%tmp1.upgrd.1 = icmp eq i32 %tmp1, 0		; <i1> [#uses=1]
15	br i1 %tmp1.upgrd.1, label %cond_next, label %cond_true
16
17cond_true:		; preds = %entry
18	store i32 1, ptr @A
19	br label %cond_next
20
21cond_next:		; preds = %cond_true, %entry
22	%tmp4 = and i32 %X, 2		; <i32> [#uses=1]
23	%tmp4.upgrd.2 = icmp eq i32 %tmp4, 0		; <i1> [#uses=1]
24	br i1 %tmp4.upgrd.2, label %cond_next7, label %cond_true5
25
26cond_true5:		; preds = %cond_next
27	store i32 1, ptr @B
28	br label %cond_next7
29
30cond_next7:		; preds = %cond_true5, %cond_next
31	%tmp10 = and i32 %X, 4		; <i32> [#uses=1]
32	%tmp10.upgrd.3 = icmp eq i32 %tmp10, 0		; <i1> [#uses=1]
33	br i1 %tmp10.upgrd.3, label %cond_next13, label %cond_true11
34
35cond_true11:		; preds = %cond_next7
36	store i32 1, ptr @C
37	br label %cond_next13
38
39cond_next13:		; preds = %cond_true11, %cond_next7
40	%tmp16 = and i32 %X, 8		; <i32> [#uses=1]
41	%tmp16.upgrd.4 = icmp eq i32 %tmp16, 0		; <i1> [#uses=1]
42	br i1 %tmp16.upgrd.4, label %UnifiedReturnBlock, label %cond_true17
43
44cond_true17:		; preds = %cond_next13
45	call void @ext( ptr %ALL )
46	ret void
47
48UnifiedReturnBlock:		; preds = %cond_next13
49	ret void
50}
51
52; CHECK-NOT: @bar(
53define internal fastcc void @bar(i32 %X) {
54entry:
55	%ALL = alloca i32, align 4		; <ptr> [#uses=1]
56	%tmp1 = and i32 %X, 1		; <i32> [#uses=1]
57	%tmp1.upgrd.1 = icmp eq i32 %tmp1, 0		; <i1> [#uses=1]
58	br i1 %tmp1.upgrd.1, label %cond_next, label %cond_true
59
60cond_true:		; preds = %entry
61	store i32 1, ptr @A
62	br label %cond_next
63
64cond_next:		; preds = %cond_true, %entry
65	%tmp4 = and i32 %X, 2		; <i32> [#uses=1]
66	%tmp4.upgrd.2 = icmp eq i32 %tmp4, 0		; <i1> [#uses=1]
67	br i1 %tmp4.upgrd.2, label %cond_next7, label %cond_true5
68
69cond_true5:		; preds = %cond_next
70	store i32 1, ptr @B
71	br label %cond_next7
72
73cond_next7:		; preds = %cond_true5, %cond_next
74	%tmp10 = and i32 %X, 4		; <i32> [#uses=1]
75	%tmp10.upgrd.3 = icmp eq i32 %tmp10, 0		; <i1> [#uses=1]
76	br i1 %tmp10.upgrd.3, label %cond_next13, label %cond_true11
77
78cond_true11:		; preds = %cond_next7
79	store i32 1, ptr @C
80	br label %cond_next13
81
82cond_next13:		; preds = %cond_true11, %cond_next7
83	%tmp16 = and i32 %X, 8		; <i32> [#uses=1]
84	%tmp16.upgrd.4 = icmp eq i32 %tmp16, 0		; <i1> [#uses=1]
85	br i1 %tmp16.upgrd.4, label %UnifiedReturnBlock, label %cond_true17
86
87cond_true17:		; preds = %cond_next13
88	call void @foo( i32 %X )
89	ret void
90
91UnifiedReturnBlock:		; preds = %cond_next13
92	ret void
93}
94
95define internal fastcc void @bar2(i32 %X) {
96entry:
97	call void @foo( i32 %X )
98	ret void
99}
100
101declare void @ext(ptr)
102
103define void @test(i32 %X) {
104entry:
105; CHECK: test
106; CHECK-NOT: @bar(
107	tail call fastcc void @bar( i32 %X )
108	tail call fastcc void @bar( i32 %X )
109	tail call fastcc void @bar2( i32 %X )
110	tail call fastcc void @bar2( i32 %X )
111	ret void
112; CHECK: ret
113}
114