1; RUN: opt -S -mtriple=nvptx64-nvidia-cuda -passes=infer-address-spaces -o - %s | FileCheck %s 2 3; CHECK-LABEL: @f0 4; CHECK: addrspacecast ptr {{%.*}} to ptr addrspace(4) 5; CHECK: getelementptr inbounds float, ptr addrspace(4) 6; CHECK: load float, ptr addrspace(4) 7define float @f0(ptr %p) { 8entry: 9 %0 = call i1 @llvm.nvvm.isspacep.const(ptr %p) 10 tail call void @llvm.assume(i1 %0) 11 %1 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 12 %idxprom = zext i32 %1 to i64 13 %arrayidx = getelementptr inbounds float, ptr %p, i64 %idxprom 14 %2 = load float, ptr %arrayidx, align 4 15 ret float %2 16} 17 18; CHECK-LABEL: @f1 19; CHECK: addrspacecast ptr {{%.*}} to ptr addrspace(1) 20; CHECK: getelementptr inbounds float, ptr addrspace(1) 21; CHECK: load float, ptr addrspace(1) 22define float @f1(ptr %p) { 23entry: 24 %0 = call i1 @llvm.nvvm.isspacep.global(ptr %p) 25 tail call void @llvm.assume(i1 %0) 26 %1 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 27 %idxprom = zext i32 %1 to i64 28 %arrayidx = getelementptr inbounds float, ptr %p, i64 %idxprom 29 %2 = load float, ptr %arrayidx, align 4 30 ret float %2 31} 32 33; CHECK-LABEL: @f2 34; CHECK: addrspacecast ptr {{%.*}} to ptr addrspace(5) 35; CHECK: getelementptr inbounds float, ptr addrspace(5) 36; CHECK: load float, ptr addrspace(5) 37define float @f2(ptr %p) { 38entry: 39 %0 = call i1 @llvm.nvvm.isspacep.local(ptr %p) 40 tail call void @llvm.assume(i1 %0) 41 %1 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 42 %idxprom = zext i32 %1 to i64 43 %arrayidx = getelementptr inbounds float, ptr %p, i64 %idxprom 44 %2 = load float, ptr %arrayidx, align 4 45 ret float %2 46} 47 48; CHECK-LABEL: @f3 49; CHECK: addrspacecast ptr {{%.*}} to ptr addrspace(3) 50; CHECK: getelementptr inbounds float, ptr addrspace(3) 51; CHECK: load float, ptr addrspace(3) 52define float @f3(ptr %p) { 53entry: 54 %0 = call i1 @llvm.nvvm.isspacep.shared(ptr %p) 55 tail call void @llvm.assume(i1 %0) 56 %1 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 57 %idxprom = zext i32 %1 to i64 58 %arrayidx = getelementptr inbounds float, ptr %p, i64 %idxprom 59 %2 = load float, ptr %arrayidx, align 4 60 ret float %2 61} 62 63; CHECK-LABEL: @g0 64; CHECK: if.then: 65; CHECK: addrspacecast ptr {{%.*}} to ptr addrspace(3) 66; CHECK: getelementptr inbounds float, ptr addrspace(3) 67; CHECK: load float, ptr addrspace(3) 68; CHECK: if.end: 69; CHECK: getelementptr inbounds float, ptr 70; CHECK: load float, ptr 71define float @g0(i32 %c, ptr %p) { 72entry: 73 %tobool.not = icmp eq i32 %c, 0 74 br i1 %tobool.not, label %if.end, label %if.then 75 76if.then: 77 %0 = call i1 @llvm.nvvm.isspacep.shared(ptr %p) 78 tail call void @llvm.assume(i1 %0) 79 %1 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 80 %idxprom = zext i32 %1 to i64 81 %arrayidx = getelementptr inbounds float, ptr %p, i64 %idxprom 82 %2 = load float, ptr %arrayidx, align 4 83 %add = fadd float %2, 0. 84 br label %if.end 85 86if.end: 87 %s = phi float [ %add, %if.then ], [ 0., %entry ] 88 %3 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.y() 89 %idxprom2 = zext i32 %3 to i64 90 %arrayidx2 = getelementptr inbounds float, ptr %p, i64 %idxprom2 91 %4 = load float, ptr %arrayidx2, align 4 92 %add2 = fadd float %s, %4 93 ret float %add2 94} 95 96declare void @llvm.assume(i1) 97declare i1 @llvm.nvvm.isspacep.const(ptr) 98declare i1 @llvm.nvvm.isspacep.global(ptr) 99declare i1 @llvm.nvvm.isspacep.local(ptr) 100declare i1 @llvm.nvvm.isspacep.shared(ptr) 101declare i32 @llvm.nvvm.read.ptx.sreg.tid.x() 102declare i32 @llvm.nvvm.read.ptx.sreg.tid.y() 103