xref: /llvm-project/llvm/test/Transforms/IndirectBrExpand/basic.ll (revision 80bb994d2b17b7e116e76492b9d6ede07c72d82c)
1; RUN: opt < %s -indirectbr-expand -S | FileCheck %s
2; RUN: opt < %s -passes=indirectbr-expand -S | FileCheck %s
3;
4; REQUIRES: x86-registered-target
5
6target triple = "x86_64-unknown-linux-gnu"
7
8@test1.targets = constant [4 x ptr] [ptr blockaddress(@test1, %bb0),
9                                     ptr blockaddress(@test1, %bb1),
10                                     ptr blockaddress(@test1, %bb2),
11                                     ptr blockaddress(@test1, %bb3)]
12; CHECK-LABEL: @test1.targets = constant [4 x ptr]
13; CHECK:       [ptr inttoptr (i64 1 to ptr),
14; CHECK:        ptr inttoptr (i64 2 to ptr),
15; CHECK:        ptr inttoptr (i64 3 to ptr),
16; CHECK:        ptr blockaddress(@test1, %bb3)]
17
18define void @test1(ptr readonly %p, ptr %sink) #0 {
19; CHECK-LABEL: define void @test1(
20entry:
21  %i0 = load i64, ptr %p
22  %target.i0 = getelementptr [4 x ptr], ptr @test1.targets, i64 0, i64 %i0
23  %target0 = load ptr, ptr %target.i0
24  ; Only a subset of blocks are viable successors here.
25  indirectbr ptr %target0, [label %bb0, label %bb1]
26; CHECK-NOT:     indirectbr
27; CHECK:         %[[ENTRY_V:.*]] = ptrtoint ptr %{{.*}} to i64
28; CHECK-NEXT:    br label %[[SWITCH_BB:.*]]
29
30bb0:
31  store volatile i64 0, ptr %sink
32  br label %latch
33
34bb1:
35  store volatile i64 1, ptr %sink
36  br label %latch
37
38bb2:
39  store volatile i64 2, ptr %sink
40  br label %latch
41
42bb3:
43  store volatile i64 3, ptr %sink
44  br label %latch
45
46latch:
47  %i.next = load i64, ptr %p
48  %target.i.next = getelementptr [4 x ptr], ptr @test1.targets, i64 0, i64 %i.next
49  %target.next = load ptr, ptr %target.i.next
50  ; A different subset of blocks are viable successors here.
51  indirectbr ptr %target.next, [label %bb1, label %bb2]
52; CHECK-NOT:     indirectbr
53; CHECK:         %[[LATCH_V:.*]] = ptrtoint ptr %{{.*}} to i64
54; CHECK-NEXT:    br label %[[SWITCH_BB]]
55;
56; CHECK:       [[SWITCH_BB]]:
57; CHECK-NEXT:    %[[V:.*]] = phi i64 [ %[[ENTRY_V]], %entry ], [ %[[LATCH_V]], %latch ]
58; CHECK-NEXT:    switch i64 %[[V]], label %bb0 [
59; CHECK-NEXT:      i64 2, label %bb1
60; CHECK-NEXT:      i64 3, label %bb2
61; CHECK-NEXT:    ]
62}
63
64attributes #0 = { "target-features"="+retpoline" }
65