xref: /llvm-project/llvm/test/Transforms/IndVarSimplify/lrev-existing-umin.ll (revision 864bb84a427de367528d15270790dd152871daf2)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -passes=indvars < %s | FileCheck %s
3
4; Do not rewrite the user outside the loop because we must keep the instruction
5; inside the loop due to store. Rewrite doesn't give us any profit.
6define void @f(i32 %length.i.88, i32 %length.i, ptr %tmp12, i32 %tmp10, ptr %tmp8) {
7; CHECK-LABEL: @f(
8; CHECK-NEXT:  not_zero11.preheader:
9; CHECK-NEXT:    [[TMP13:%.*]] = icmp ugt i32 [[LENGTH_I:%.*]], [[LENGTH_I_88:%.*]]
10; CHECK-NEXT:    [[TMP14:%.*]] = select i1 [[TMP13]], i32 [[LENGTH_I_88]], i32 [[LENGTH_I]]
11; CHECK-NEXT:    [[TMP15:%.*]] = icmp sgt i32 [[TMP14]], 0
12; CHECK-NEXT:    br i1 [[TMP15]], label [[NOT_ZERO11_PREHEADER1:%.*]], label [[NOT_ZERO11_POSTLOOP:%.*]]
13; CHECK:       not_zero11.preheader1:
14; CHECK-NEXT:    br label [[NOT_ZERO11:%.*]]
15; CHECK:       not_zero11:
16; CHECK-NEXT:    [[V_1:%.*]] = phi i32 [ [[TMP22:%.*]], [[NOT_ZERO11]] ], [ 0, [[NOT_ZERO11_PREHEADER1]] ]
17; CHECK-NEXT:    [[TMP16:%.*]] = zext i32 [[V_1]] to i64
18; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i8, ptr [[TMP8:%.*]], i64 [[TMP16]]
19; CHECK-NEXT:    [[TMP18:%.*]] = load i8, ptr [[TMP17]], align 1
20; CHECK-NEXT:    [[TMP19:%.*]] = zext i8 [[TMP18]] to i32
21; CHECK-NEXT:    [[TMP20:%.*]] = or i32 [[TMP19]], [[TMP10:%.*]]
22; CHECK-NEXT:    [[TMP21:%.*]] = trunc i32 [[TMP20]] to i8
23; CHECK-NEXT:    [[ADDR22:%.*]] = getelementptr inbounds i8, ptr [[TMP12:%.*]], i64 [[TMP16]]
24; CHECK-NEXT:    store i8 [[TMP21]], ptr [[ADDR22]], align 1
25; CHECK-NEXT:    [[TMP22]] = add nuw nsw i32 [[V_1]], 1
26; CHECK-NEXT:    [[TMP23:%.*]] = icmp slt i32 [[TMP22]], [[TMP14]]
27; CHECK-NEXT:    br i1 [[TMP23]], label [[NOT_ZERO11]], label [[MAIN_EXIT_SELECTOR:%.*]]
28; CHECK:       main.exit.selector:
29; CHECK-NEXT:    [[TMP22_LCSSA:%.*]] = phi i32 [ [[TMP22]], [[NOT_ZERO11]] ]
30; CHECK-NEXT:    [[TMP24:%.*]] = icmp slt i32 [[TMP22_LCSSA]], [[LENGTH_I]]
31; CHECK-NEXT:    br i1 [[TMP24]], label [[NOT_ZERO11_POSTLOOP]], label [[LEAVE:%.*]]
32; CHECK:       leave:
33; CHECK-NEXT:    ret void
34; CHECK:       not_zero11.postloop:
35; CHECK-NEXT:    ret void
36;
37not_zero11.preheader:
38  %tmp13 = icmp ugt i32 %length.i, %length.i.88
39  %tmp14 = select i1 %tmp13, i32 %length.i.88, i32 %length.i
40  %tmp15 = icmp sgt i32 %tmp14, 0
41  br i1 %tmp15, label %not_zero11, label %not_zero11.postloop
42
43not_zero11:
44  %v_1 = phi i32 [ %tmp22, %not_zero11 ], [ 0, %not_zero11.preheader ]
45  %tmp16 = zext i32 %v_1 to i64
46  %tmp17 = getelementptr inbounds i8, ptr %tmp8, i64 %tmp16
47  %tmp18 = load i8, ptr %tmp17, align 1
48  %tmp19 = zext i8 %tmp18 to i32
49  %tmp20 = or i32 %tmp19, %tmp10
50  %tmp21 = trunc i32 %tmp20 to i8
51  %addr22 = getelementptr inbounds i8, ptr %tmp12, i64 %tmp16
52  store i8 %tmp21, ptr %addr22, align 1
53  %tmp22 = add nuw nsw i32 %v_1, 1
54  %tmp23 = icmp slt i32 %tmp22, %tmp14
55  br i1 %tmp23, label %not_zero11, label %main.exit.selector
56
57main.exit.selector:
58  %tmp24 = icmp slt i32 %tmp22, %length.i
59  br i1 %tmp24, label %not_zero11.postloop, label %leave
60
61leave:
62  ret void
63
64not_zero11.postloop:
65  ret void
66}
67
68; Rewrite the user outside the loop because there is no hard users inside the loop.
69define void @f1(i32 %length.i.88, i32 %length.i, ptr %tmp12, i32 %tmp10, ptr %tmp8) {
70; CHECK-LABEL: @f1(
71; CHECK-NEXT:  not_zero11.preheader:
72; CHECK-NEXT:    [[TMP13:%.*]] = icmp ugt i32 [[LENGTH_I:%.*]], [[LENGTH_I_88:%.*]]
73; CHECK-NEXT:    [[TMP14:%.*]] = select i1 [[TMP13]], i32 [[LENGTH_I_88]], i32 [[LENGTH_I]]
74; CHECK-NEXT:    [[TMP15:%.*]] = icmp sgt i32 [[TMP14]], 0
75; CHECK-NEXT:    br i1 [[TMP15]], label [[NOT_ZERO11_PREHEADER1:%.*]], label [[NOT_ZERO11_POSTLOOP:%.*]]
76; CHECK:       not_zero11.preheader1:
77; CHECK-NEXT:    br label [[NOT_ZERO11:%.*]]
78; CHECK:       not_zero11:
79; CHECK-NEXT:    [[V_1:%.*]] = phi i32 [ [[TMP22:%.*]], [[NOT_ZERO11]] ], [ 0, [[NOT_ZERO11_PREHEADER1]] ]
80; CHECK-NEXT:    [[TMP16:%.*]] = zext i32 [[V_1]] to i64
81; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i8, ptr [[TMP8:%.*]], i64 [[TMP16]]
82; CHECK-NEXT:    [[TMP18:%.*]] = load i8, ptr [[TMP17]], align 1
83; CHECK-NEXT:    [[TMP19:%.*]] = zext i8 [[TMP18]] to i32
84; CHECK-NEXT:    [[TMP20:%.*]] = or i32 [[TMP19]], [[TMP10:%.*]]
85; CHECK-NEXT:    [[TMP21:%.*]] = trunc i32 [[TMP20]] to i8
86; CHECK-NEXT:    [[ADDR22:%.*]] = getelementptr inbounds i8, ptr [[TMP12:%.*]], i64 [[TMP16]]
87; CHECK-NEXT:    [[TMP22]] = add nuw nsw i32 [[V_1]], 1
88; CHECK-NEXT:    br i1 false, label [[NOT_ZERO11]], label [[MAIN_EXIT_SELECTOR:%.*]]
89; CHECK:       main.exit.selector:
90; CHECK-NEXT:    [[TMP24:%.*]] = icmp slt i32 [[TMP14]], [[LENGTH_I]]
91; CHECK-NEXT:    br i1 [[TMP24]], label [[NOT_ZERO11_POSTLOOP]], label [[LEAVE:%.*]]
92; CHECK:       leave:
93; CHECK-NEXT:    ret void
94; CHECK:       not_zero11.postloop:
95; CHECK-NEXT:    ret void
96;
97not_zero11.preheader:
98  %tmp13 = icmp ugt i32 %length.i, %length.i.88
99  %tmp14 = select i1 %tmp13, i32 %length.i.88, i32 %length.i
100  %tmp15 = icmp sgt i32 %tmp14, 0
101  br i1 %tmp15, label %not_zero11, label %not_zero11.postloop
102
103not_zero11:
104  %v_1 = phi i32 [ %tmp22, %not_zero11 ], [ 0, %not_zero11.preheader ]
105  %tmp16 = zext i32 %v_1 to i64
106  %tmp17 = getelementptr inbounds i8, ptr %tmp8, i64 %tmp16
107  %tmp18 = load i8, ptr %tmp17, align 1
108  %tmp19 = zext i8 %tmp18 to i32
109  %tmp20 = or i32 %tmp19, %tmp10
110  %tmp21 = trunc i32 %tmp20 to i8
111  %addr22 = getelementptr inbounds i8, ptr %tmp12, i64 %tmp16
112  %tmp22 = add nuw nsw i32 %v_1, 1
113  %tmp23 = icmp slt i32 %tmp22, %tmp14
114  br i1 %tmp23, label %not_zero11, label %main.exit.selector
115
116main.exit.selector:
117  %tmp24 = icmp slt i32 %tmp22, %length.i
118  br i1 %tmp24, label %not_zero11.postloop, label %leave
119
120leave:
121  ret void
122
123not_zero11.postloop:
124  ret void
125}
126