1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=indvars -S | FileCheck %s 3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1" 5 6; We make a transform by getting rid of add nsw i32 %tmp17, -1; make sure that 7; we drop "exact" flag on lshr as we do it. 8define void @drop_exact(ptr %p, ptr %p1) { 9; CHECK-LABEL: @drop_exact( 10; CHECK-NEXT: bb: 11; CHECK-NEXT: br label [[BB12:%.*]] 12; CHECK: bb7: 13; CHECK-NEXT: ret void 14; CHECK: bb12: 15; CHECK-NEXT: [[TMP13:%.*]] = phi i32 [ -47436, [[BB:%.*]] ], [ [[TMP15:%.*]], [[BB12]] ] 16; CHECK-NEXT: [[TMP14:%.*]] = phi i32 [ 0, [[BB]] ], [ [[TMP42:%.*]], [[BB12]] ] 17; CHECK-NEXT: [[TMP15]] = add nsw i32 [[TMP13]], -1 18; CHECK-NEXT: [[TMP16:%.*]] = shl i32 [[TMP15]], 1 19; CHECK-NEXT: [[TMP17:%.*]] = sub nsw i32 42831, [[TMP16]] 20; CHECK-NEXT: [[TMP19:%.*]] = lshr i32 [[TMP17]], 1 21; CHECK-NEXT: [[TMP20:%.*]] = urem i32 [[TMP19]], 250 22; CHECK-NEXT: [[TMP22:%.*]] = lshr i32 [[TMP17]], 1 23; CHECK-NEXT: store i32 [[TMP22]], ptr [[P:%.*]], align 4 24; CHECK-NEXT: [[TMP26:%.*]] = zext i32 [[TMP20]] to i64 25; CHECK-NEXT: store i64 [[TMP26]], ptr [[P1:%.*]], align 4 26; CHECK-NEXT: [[TMP42]] = add nuw nsw i32 [[TMP14]], 1 27; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[TMP42]], 719 28; CHECK-NEXT: br i1 [[EXITCOND]], label [[BB7:%.*]], label [[BB12]] 29; 30bb: 31 br label %bb12 32 33bb7: ; preds = %bb12 34 ret void 35 36bb12: ; preds = %bb12, %bb 37 %tmp13 = phi i32 [ -47436, %bb ], [ %tmp15, %bb12 ] 38 %tmp14 = phi i32 [ 0, %bb ], [ %tmp42, %bb12 ] 39 %tmp15 = add i32 %tmp13, -1 40 %tmp16 = shl i32 %tmp15, 1 41 %tmp17 = sub i32 42831, %tmp16 42 %tmp19 = lshr i32 %tmp17, 1 43 %tmp20 = urem i32 %tmp19, 250 44 %tmp21 = add nsw i32 %tmp17, -1 45 %tmp22 = lshr exact i32 %tmp21, 1 46 store i32 %tmp22, ptr %p, align 4 47 %tmp26 = zext i32 %tmp20 to i64 48 store i64 %tmp26, ptr %p1, align 4 49 %tmp42 = add nuw nsw i32 %tmp14, 1 50 %tmp43 = icmp ugt i32 %tmp14, 717 51 br i1 %tmp43, label %bb7, label %bb12 52} 53 54; Throw away add nsw i32 %tmp17, 0, do not drop exact flag. 55define void @dont_drop_exact(ptr %p, ptr %p1) { 56; CHECK-LABEL: @dont_drop_exact( 57; CHECK-NEXT: bb: 58; CHECK-NEXT: br label [[BB12:%.*]] 59; CHECK: bb7: 60; CHECK-NEXT: ret void 61; CHECK: bb12: 62; CHECK-NEXT: [[TMP13:%.*]] = phi i32 [ -47436, [[BB:%.*]] ], [ [[TMP15:%.*]], [[BB12]] ] 63; CHECK-NEXT: [[TMP14:%.*]] = phi i32 [ 0, [[BB]] ], [ [[TMP42:%.*]], [[BB12]] ] 64; CHECK-NEXT: [[TMP15]] = add nsw i32 [[TMP13]], -1 65; CHECK-NEXT: [[TMP16:%.*]] = shl i32 [[TMP15]], 1 66; CHECK-NEXT: [[TMP17:%.*]] = sub nsw i32 42831, [[TMP16]] 67; CHECK-NEXT: [[TMP19:%.*]] = lshr i32 [[TMP17]], 1 68; CHECK-NEXT: [[TMP20:%.*]] = urem i32 [[TMP19]], 250 69; CHECK-NEXT: [[TMP22:%.*]] = lshr exact i32 [[TMP17]], 1 70; CHECK-NEXT: store i32 [[TMP22]], ptr [[P:%.*]], align 4 71; CHECK-NEXT: [[TMP26:%.*]] = zext i32 [[TMP20]] to i64 72; CHECK-NEXT: store i64 [[TMP26]], ptr [[P1:%.*]], align 4 73; CHECK-NEXT: [[TMP42]] = add nuw nsw i32 [[TMP14]], 1 74; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[TMP42]], 719 75; CHECK-NEXT: br i1 [[EXITCOND]], label [[BB7:%.*]], label [[BB12]] 76; 77bb: 78 br label %bb12 79 80bb7: ; preds = %bb12 81 ret void 82 83bb12: ; preds = %bb12, %bb 84 %tmp13 = phi i32 [ -47436, %bb ], [ %tmp15, %bb12 ] 85 %tmp14 = phi i32 [ 0, %bb ], [ %tmp42, %bb12 ] 86 %tmp15 = add i32 %tmp13, -1 87 %tmp16 = shl i32 %tmp15, 1 88 %tmp17 = sub i32 42831, %tmp16 89 %tmp19 = lshr i32 %tmp17, 1 90 %tmp20 = urem i32 %tmp19, 250 91 %tmp21 = add nsw i32 %tmp17, 0 92 %tmp22 = lshr exact i32 %tmp21, 1 93 store i32 %tmp22, ptr %p, align 4 94 %tmp26 = zext i32 %tmp20 to i64 95 store i64 %tmp26, ptr %p1, align 4 96 %tmp42 = add nuw nsw i32 %tmp14, 1 97 %tmp43 = icmp ugt i32 %tmp14, 717 98 br i1 %tmp43, label %bb7, label %bb12 99} 100