1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -passes=indvars -scev-cheap-expansion-budget=1024 %s | FileCheck %s 3 4; See https://bugs.llvm.org/show_bug.cgi?id=45360 5; This is reduced from that (runnable) test. 6; The remainder operation is originally guarded, it never divides by zero. 7; Indvars should not make it execute unconditionally. 8 9target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 10target triple = "x86_64-pc-linux-gnu" 11 12@f = dso_local global i32 0, align 4 13@a = dso_local global i32 0, align 4 14@d = dso_local global i32 0, align 4 15@c = dso_local global i32 0, align 4 16@b = dso_local global i32 0, align 4 17@e = dso_local global i32 0, align 4 18 19define i32 @main() { 20; CHECK-LABEL: @main( 21; CHECK-NEXT: bb: 22; CHECK-NEXT: [[I6:%.*]] = load i32, ptr @a, align 4 23; CHECK-NEXT: [[I24:%.*]] = load i32, ptr @b, align 4 24; CHECK-NEXT: [[D_PROMOTED10:%.*]] = load i32, ptr @d, align 4 25; CHECK-NEXT: br label [[BB1:%.*]] 26; CHECK: bb1: 27; CHECK-NEXT: br label [[BB5:%.*]] 28; CHECK: bb13.preheader: 29; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32 [ [[TMP0:%.*]], [[BB5]] ] 30; CHECK-NEXT: [[I21:%.*]] = icmp eq i32 [[DOTLCSSA]], 0 31; CHECK-NEXT: br i1 [[I21]], label [[BB27_THREAD:%.*]], label [[BB27:%.*]] 32; CHECK: bb5: 33; CHECK-NEXT: [[TMP0]] = and i32 [[D_PROMOTED10]], [[I6]] 34; CHECK-NEXT: br i1 false, label [[BB5]], label [[BB13_PREHEADER:%.*]] 35; CHECK: bb27.thread: 36; CHECK-NEXT: [[DOTLCSSA_LCSSA:%.*]] = phi i32 [ [[DOTLCSSA]], [[BB13_PREHEADER]] ] 37; CHECK-NEXT: [[I11_LCSSA_LCSSA:%.*]] = phi i32 [ -1, [[BB13_PREHEADER]] ] 38; CHECK-NEXT: store i32 [[DOTLCSSA_LCSSA]], ptr @d, align 4 39; CHECK-NEXT: store i32 [[I11_LCSSA_LCSSA]], ptr @f, align 4 40; CHECK-NEXT: store i32 0, ptr @c, align 4 41; CHECK-NEXT: store i32 0, ptr @e, align 4 42; CHECK-NEXT: br label [[BB32:%.*]] 43; CHECK: bb27: 44; CHECK-NEXT: [[I26:%.*]] = urem i32 [[I24]], [[DOTLCSSA]] 45; CHECK-NEXT: store i32 [[I26]], ptr @e, align 4 46; CHECK-NEXT: [[I30_NOT:%.*]] = icmp eq i32 [[I26]], 0 47; CHECK-NEXT: br i1 [[I30_NOT]], label [[BB32_LOOPEXIT:%.*]], label [[BB36:%.*]] 48; CHECK: bb32.loopexit: 49; CHECK-NEXT: [[DOTLCSSA_LCSSA15:%.*]] = phi i32 [ [[DOTLCSSA]], [[BB27]] ] 50; CHECK-NEXT: [[I11_LCSSA_LCSSA14:%.*]] = phi i32 [ -1, [[BB27]] ] 51; CHECK-NEXT: store i32 [[DOTLCSSA_LCSSA15]], ptr @d, align 4 52; CHECK-NEXT: store i32 [[I11_LCSSA_LCSSA14]], ptr @f, align 4 53; CHECK-NEXT: store i32 0, ptr @c, align 4 54; CHECK-NEXT: br label [[BB32]] 55; CHECK: bb32: 56; CHECK-NEXT: ret i32 0 57; CHECK: bb36: 58; CHECK-NEXT: store i32 1, ptr @c, align 4 59; CHECK-NEXT: br label [[BB1]] 60; 61bb: 62 %i6 = load i32, ptr @a, align 4 63 %i24 = load i32, ptr @b, align 4 64 %d.promoted10 = load i32, ptr @d, align 4 65 br label %bb1 66 67bb1: ; preds = %bb36, %bb 68 br label %bb5 69 70bb13.preheader: ; preds = %bb5 71 %.lcssa = phi i32 [ %0, %bb5 ] 72 %i11.lcssa = phi i32 [ %i11, %bb5 ] 73 %i21 = icmp eq i32 %.lcssa, 0 74 br i1 %i21, label %bb27.thread, label %bb27 75 76bb5: ; preds = %bb1, %bb5 77 %storemerge6 = phi i32 [ 0, %bb1 ], [ %i11, %bb5 ] 78 %0 = and i32 %d.promoted10, %i6 79 %i11 = add nsw i32 %storemerge6, -1 80 %i4 = icmp sgt i32 %storemerge6, 0 81 br i1 %i4, label %bb5, label %bb13.preheader 82 83bb27.thread: ; preds = %bb13.preheader 84 %.lcssa.lcssa = phi i32 [ %.lcssa, %bb13.preheader ] 85 %i11.lcssa.lcssa = phi i32 [ %i11.lcssa, %bb13.preheader ] 86 store i32 %.lcssa.lcssa, ptr @d, align 4 87 store i32 %i11.lcssa.lcssa, ptr @f, align 4 88 store i32 0, ptr @c, align 4 89 store i32 0, ptr @e, align 4 90 br label %bb32 91 92bb27: ; preds = %bb13.preheader 93 %i26 = urem i32 %i24, %.lcssa 94 store i32 %i26, ptr @e, align 4 95 %i30.not = icmp eq i32 %i26, 0 96 br i1 %i30.not, label %bb32.loopexit, label %bb36 97 98bb32.loopexit: ; preds = %bb27 99 %.lcssa.lcssa15 = phi i32 [ %.lcssa, %bb27 ] 100 %i11.lcssa.lcssa14 = phi i32 [ %i11.lcssa, %bb27 ] 101 store i32 %.lcssa.lcssa15, ptr @d, align 4 102 store i32 %i11.lcssa.lcssa14, ptr @f, align 4 103 store i32 0, ptr @c, align 4 104 br label %bb32 105 106bb32: ; preds = %bb32.loopexit, %bb27.thread 107 ret i32 0 108 109bb36: ; preds = %bb27 110 store i32 1, ptr @c, align 4 111 br label %bb1 112} 113