xref: /llvm-project/llvm/test/Transforms/IndVarSimplify/X86/pr35406.ll (revision 864bb84a427de367528d15270790dd152871daf2) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -passes=indvars -verify-scev %s | FileCheck %s
3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
4target triple = "x86_64-unknown-linux-gnu"
5
6define i32 @testDiv(ptr %p, ptr %p1) {
7; CHECK-LABEL: @testDiv(
8; CHECK-NEXT:  entry:
9; CHECK-NEXT:    br label [[LOOP1:%.*]]
10; CHECK:       loop1:
11; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP2_EXIT:%.*]] ], [ 8, [[ENTRY:%.*]] ]
12; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV]], 15
13; CHECK-NEXT:    br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[GENERAL_CASE24:%.*]]
14; CHECK:       general_case24:
15; CHECK-NEXT:    br i1 false, label [[LOOP2_PREHEADER:%.*]], label [[LOOP2_EXIT]]
16; CHECK:       loop2.preheader:
17; CHECK-NEXT:    br label [[LOOP2:%.*]]
18; CHECK:       loop2:
19; CHECK-NEXT:    [[I4:%.*]] = load atomic i64, ptr [[P1:%.*]] unordered, align 8
20; CHECK-NEXT:    [[I6:%.*]] = sub i64 [[I4]], -1
21; CHECK-NEXT:    store atomic i64 [[I6]], ptr [[P1]] unordered, align 8
22; CHECK-NEXT:    br i1 true, label [[LOOP2_EXIT_LOOPEXIT:%.*]], label [[LOOP2]]
23; CHECK:       loop2.exit.loopexit:
24; CHECK-NEXT:    br label [[LOOP2_EXIT]]
25; CHECK:       loop2.exit:
26; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
27; CHECK-NEXT:    br i1 false, label [[EXIT]], label [[LOOP1]]
28; CHECK:       exit:
29; CHECK-NEXT:    ret i32 0
30;
31entry:
32  br label %loop1
33
34loop1:                                            ; preds = %loop2.exit, %entry
35  %local_0_ = phi i32 [ 8, %entry ], [ %i9, %loop2.exit ]
36  %local_2_ = phi i32 [ 63864, %entry ], [ %local_2_43, %loop2.exit ]
37  %local_3_ = phi i32 [ 51, %entry ], [ %local_3_44, %loop2.exit ]
38  %i = udiv i32 14, %local_0_
39  %i1 = icmp ugt i32 %local_0_, 14
40  br i1 %i1, label %exit, label %general_case24
41
42general_case24:                                   ; preds = %loop1
43  %i2 = udiv i32 60392, %i
44  br i1 false, label %loop2, label %loop2.exit
45
46loop2:                                            ; preds = %loop2, %general_case24
47  %local_1_56 = phi i32 [ %i2, %general_case24 ], [ %i3, %loop2 ]
48  %local_2_57 = phi i32 [ 1, %general_case24 ], [ %i7, %loop2 ]
49  %i3 = add i32 %local_1_56, -1
50  %i4 = load atomic i64, ptr %p1 unordered, align 8
51  %i5 = sext i32 %i3 to i64
52  %i6 = sub i64 %i4, %i5
53  store atomic i64 %i6, ptr %p1 unordered, align 8
54  %i7 = add nuw nsw i32 %local_2_57, 1
55  %i8 = icmp ugt i32 %local_2_57, 7
56  br i1 %i8, label %loop2.exit, label %loop2
57
58loop2.exit:                                       ; preds = %loop2, %general_case24
59  %local_2_43 = phi i32 [ %local_2_, %general_case24 ], [ 9, %loop2 ]
60  %local_3_44 = phi i32 [ %local_3_, %general_case24 ], [ %local_1_56, %loop2 ]
61  %i9 = add nuw nsw i32 %local_0_, 1
62  %i10 = icmp ugt i32 %local_0_, 129
63  br i1 %i10, label %exit, label %loop1
64
65exit:                                             ; preds = %loop2.exit, %loop1
66  ret i32 0
67}
68
69define i32 @testRem(ptr %p, ptr %p1) {
70; CHECK-LABEL: @testRem(
71; CHECK-NEXT:  entry:
72; CHECK-NEXT:    br label [[LOOP1:%.*]]
73; CHECK:       loop1:
74; CHECK-NEXT:    [[LOCAL_0_:%.*]] = phi i32 [ 8, [[ENTRY:%.*]] ], [ [[I9:%.*]], [[LOOP2_EXIT:%.*]] ]
75; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i32 [[LOCAL_0_]], 15
76; CHECK-NEXT:    br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[GENERAL_CASE24:%.*]]
77; CHECK:       general_case24:
78; CHECK-NEXT:    br i1 false, label [[LOOP2_PREHEADER:%.*]], label [[LOOP2_EXIT]]
79; CHECK:       loop2.preheader:
80; CHECK-NEXT:    br label [[LOOP2:%.*]]
81; CHECK:       loop2:
82; CHECK-NEXT:    [[I4:%.*]] = load atomic i64, ptr [[P1:%.*]] unordered, align 8
83; CHECK-NEXT:    [[I6:%.*]] = sub i64 [[I4]], -1
84; CHECK-NEXT:    store atomic i64 [[I6]], ptr [[P1]] unordered, align 8
85; CHECK-NEXT:    br i1 true, label [[LOOP2_EXIT_LOOPEXIT:%.*]], label [[LOOP2]]
86; CHECK:       loop2.exit.loopexit:
87; CHECK-NEXT:    br label [[LOOP2_EXIT]]
88; CHECK:       loop2.exit:
89; CHECK-NEXT:    [[I9]] = add nuw nsw i32 [[LOCAL_0_]], 1
90; CHECK-NEXT:    br i1 false, label [[EXIT]], label [[LOOP1]]
91; CHECK:       exit:
92; CHECK-NEXT:    ret i32 0
93;
94entry:
95  br label %loop1
96
97loop1:                                            ; preds = %loop2.exit, %entry
98  %local_0_ = phi i32 [ 8, %entry ], [ %i9, %loop2.exit ]
99  %local_2_ = phi i32 [ 63864, %entry ], [ %local_2_43, %loop2.exit ]
100  %local_3_ = phi i32 [ 51, %entry ], [ %local_3_44, %loop2.exit ]
101  %i = udiv i32 14, %local_0_
102  %i1 = icmp ugt i32 %local_0_, 14
103  br i1 %i1, label %exit, label %general_case24
104
105general_case24:                                   ; preds = %loop1
106  %i2 = urem i32 60392, %i
107  br i1 false, label %loop2, label %loop2.exit
108
109loop2:                                            ; preds = %loop2, %general_case24
110  %local_1_56 = phi i32 [ %i2, %general_case24 ], [ %i3, %loop2 ]
111  %local_2_57 = phi i32 [ 1, %general_case24 ], [ %i7, %loop2 ]
112  %i3 = add i32 %local_1_56, -1
113  %i4 = load atomic i64, ptr %p1 unordered, align 8
114  %i5 = sext i32 %i3 to i64
115  %i6 = sub i64 %i4, %i5
116  store atomic i64 %i6, ptr %p1 unordered, align 8
117  %i7 = add nuw nsw i32 %local_2_57, 1
118  %i8 = icmp ugt i32 %local_2_57, 7
119  br i1 %i8, label %loop2.exit, label %loop2
120
121loop2.exit:                                       ; preds = %loop2, %general_case24
122  %local_2_43 = phi i32 [ %local_2_, %general_case24 ], [ 9, %loop2 ]
123  %local_3_44 = phi i32 [ %local_3_, %general_case24 ], [ %local_1_56, %loop2 ]
124  %i9 = add nuw nsw i32 %local_0_, 1
125  %i10 = icmp ugt i32 %local_0_, 129
126  br i1 %i10, label %exit, label %loop1
127
128exit:                                             ; preds = %loop2.exit, %loop1
129  ret i32 0
130}
131