xref: /llvm-project/llvm/test/Transforms/IROutliner/phi-nodes-parent-block-referential.ll (revision f4b925ee7078f058602fd323e25f45f1ae91ca34)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs
2; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost < %s | FileCheck %s
3
4; Show that we do not outline when all of the phi nodes in the beginning
5; block are included not in the region.
6
7define void @function1(ptr %a, ptr %b) {
8entry:
9  %0 = alloca i32, align 4
10  %c = load i32, ptr %0, align 4
11  %y = add i32 %c, %c
12  br label %test1
13dummy:
14  ret void
15test1:
16  %1 = phi i32 [ %e, %test1 ], [ %y, %entry ]
17  %2 = phi i32 [ %e, %test1 ], [ %y, %entry  ]
18  %e = load i32, ptr %0, align 4
19  %3 = add i32 %c, %c
20  %4 = sub i32 %c, %c
21  br i1 true, label %first, label %test1
22first:
23  ret void
24}
25
26define void @function2(ptr %a, ptr %b) {
27entry:
28  %0 = alloca i32, align 4
29  %c = load i32, ptr %0, align 4
30  %y = mul i32 %c, %c
31  br label %test1
32dummy:
33  ret void
34test1:
35  %1 = phi i32 [ %e, %test1 ], [ %y, %entry ]
36  %2 = phi i32 [ %y, %entry ], [ %e, %test1 ]
37  %e = load i32, ptr %0, align 4
38  %3 = add i32 %c, %c
39  %4 = mul i32 %c, %c
40  br i1 true, label %first, label %test1
41first:
42  ret void
43}
44; CHECK-LABEL: @function1(
45; CHECK-NEXT:  entry:
46; CHECK-NEXT:    [[E_LOC:%.*]] = alloca i32, align 4
47; CHECK-NEXT:    [[TMP0:%.*]] = alloca i32, align 4
48; CHECK-NEXT:    [[C:%.*]] = load i32, ptr [[TMP0]], align 4
49; CHECK-NEXT:    [[Y:%.*]] = add i32 [[C]], [[C]]
50; CHECK-NEXT:    br label [[TEST1:%.*]]
51; CHECK:       dummy:
52; CHECK-NEXT:    ret void
53; CHECK:       test1:
54; CHECK-NEXT:    [[TMP1:%.*]] = phi i32 [ [[E_RELOAD:%.*]], [[TEST1]] ], [ [[Y]], [[ENTRY:%.*]] ]
55; CHECK-NEXT:    [[TMP2:%.*]] = phi i32 [ [[E_RELOAD]], [[TEST1]] ], [ [[Y]], [[ENTRY]] ]
56; CHECK-NEXT:    call void @llvm.lifetime.start.p0(i64 -1, ptr [[E_LOC]])
57; CHECK-NEXT:    call void @outlined_ir_func_0(ptr [[TMP0]], i32 [[C]], ptr [[E_LOC]])
58; CHECK-NEXT:    [[E_RELOAD]] = load i32, ptr [[E_LOC]], align 4
59; CHECK-NEXT:    call void @llvm.lifetime.end.p0(i64 -1, ptr [[E_LOC]])
60; CHECK-NEXT:    [[TMP3:%.*]] = sub i32 [[C]], [[C]]
61; CHECK-NEXT:    br i1 true, label [[FIRST:%.*]], label [[TEST1]]
62; CHECK:       first:
63; CHECK-NEXT:    ret void
64;
65;
66; CHECK-LABEL: @function2(
67; CHECK-NEXT:  entry:
68; CHECK-NEXT:    [[E_LOC:%.*]] = alloca i32, align 4
69; CHECK-NEXT:    [[TMP0:%.*]] = alloca i32, align 4
70; CHECK-NEXT:    [[C:%.*]] = load i32, ptr [[TMP0]], align 4
71; CHECK-NEXT:    [[Y:%.*]] = mul i32 [[C]], [[C]]
72; CHECK-NEXT:    br label [[TEST1:%.*]]
73; CHECK:       dummy:
74; CHECK-NEXT:    ret void
75; CHECK:       test1:
76; CHECK-NEXT:    [[TMP1:%.*]] = phi i32 [ [[E_RELOAD:%.*]], [[TEST1]] ], [ [[Y]], [[ENTRY:%.*]] ]
77; CHECK-NEXT:    [[TMP2:%.*]] = phi i32 [ [[Y]], [[ENTRY]] ], [ [[E_RELOAD]], [[TEST1]] ]
78; CHECK-NEXT:    call void @llvm.lifetime.start.p0(i64 -1, ptr [[E_LOC]])
79; CHECK-NEXT:    call void @outlined_ir_func_0(ptr [[TMP0]], i32 [[C]], ptr [[E_LOC]])
80; CHECK-NEXT:    [[E_RELOAD]] = load i32, ptr [[E_LOC]], align 4
81; CHECK-NEXT:    call void @llvm.lifetime.end.p0(i64 -1, ptr [[E_LOC]])
82; CHECK-NEXT:    [[TMP3:%.*]] = mul i32 [[C]], [[C]]
83; CHECK-NEXT:    br i1 true, label [[FIRST:%.*]], label [[TEST1]]
84; CHECK:       first:
85; CHECK-NEXT:    ret void
86;
87;
88; CHECK-LABEL: define internal void @outlined_ir_func_0(
89; CHECK-NEXT:  newFuncRoot:
90; CHECK-NEXT:    br label [[TEST1_TO_OUTLINE:%.*]]
91; CHECK:       test1_to_outline:
92; CHECK-NEXT:    [[E:%.*]] = load i32, ptr [[TMP0:%.*]], align 4
93; CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP1:%.*]], [[TMP1]]
94; CHECK-NEXT:    br label [[TEST1_AFTER_OUTLINE_EXITSTUB:%.*]]
95; CHECK:       test1_after_outline.exitStub:
96; CHECK-NEXT:    store i32 [[E]], ptr [[TMP2:%.*]], align 4
97; CHECK-NEXT:    ret void
98;
99