xref: /llvm-project/llvm/test/Transforms/IROutliner/outlining-larger-size-commutative.ll (revision 47f528217ed82121882bcf2722c743360237c409)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -p iroutliner,verify -ir-outlining-no-cost < %s | FileCheck %s
3
4; This test checks that commutative instructions where the operands are
5; swapped are outlined as the same function.
6
7; It also checks that non-commutative instructions outlined as different
8; functions when the operands are swapped;
9
10; These are identical functions, except that in the flipped functions,
11; the operands in the adds are commuted.  However, since add instructions
12; are commutative, we should still outline from all four as the same
13; instruction.
14
15define void @function1(i32 %a, i32 %b) {
16; CHECK-LABEL: @function1(
17; CHECK-NEXT:  entry:
18; CHECK-NEXT:    br label [[BLOCK_1:%.*]]
19; CHECK:       block_0:
20; CHECK-NEXT:    [[TMP0:%.*]] = add i32 [[A:%.*]], [[B:%.*]]
21; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[TMP4:%.*]], 1
22; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[TMP0]], [[TMP0]]
23; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i32 [[TMP0]], [[TMP0]]
24; CHECK-NEXT:    br i1 [[TMP3]], label [[BLOCK_1]], label [[BLOCK_2:%.*]]
25; CHECK:       block_1:
26; CHECK-NEXT:    [[TMP4]] = phi i32 [ [[TMP1]], [[BLOCK_0:%.*]] ], [ 0, [[ENTRY:%.*]] ]
27; CHECK-NEXT:    call void @outlined_ir_func_0(i32 [[B]])
28; CHECK-NEXT:    br label [[BLOCK_0]]
29; CHECK:       block_2:
30; CHECK-NEXT:    [[TMP5:%.*]] = add i32 [[TMP2]], [[TMP2]]
31; CHECK-NEXT:    ret void
32;
33entry:
34  br label %block_1
35
36block_0:
37  %0 = add i32 %a, %b
38  %1 = add i32 %4, 1
39  %2 = add i32 %0, %0
40  %3 = icmp sgt i32 %0, %0
41  br i1 %3, label %block_1, label %block_2
42
43block_1:
44  %4 = phi i32 [ %1, %block_0 ], [ 0, %entry ]
45  %5 = add i32 %b, %b
46  br label %block_0
47
48block_2:
49  %6 = add i32 %2, %2
50  ret void
51}
52
53define void @function2(i32 %a, i32 %b) {
54; CHECK-LABEL: @function2(
55; CHECK-NEXT:  entry:
56; CHECK-NEXT:    br label [[BLOCK_1:%.*]]
57; CHECK:       block_0:
58; CHECK-NEXT:    [[TMP0:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
59; CHECK-NEXT:    [[TMP1:%.*]] = add i32 1, [[TMP4:%.*]]
60; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[TMP0]], [[TMP0]]
61; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i32 [[TMP0]], [[TMP0]]
62; CHECK-NEXT:    br i1 [[TMP3]], label [[BLOCK_1]], label [[BLOCK_2:%.*]]
63; CHECK:       block_1:
64; CHECK-NEXT:    [[TMP4]] = phi i32 [ [[TMP1]], [[BLOCK_0:%.*]] ], [ 0, [[ENTRY:%.*]] ]
65; CHECK-NEXT:    call void @outlined_ir_func_0(i32 [[B]])
66; CHECK-NEXT:    br label [[BLOCK_0]]
67; CHECK:       block_2:
68; CHECK-NEXT:    [[TMP5:%.*]] = sub i32 [[TMP2]], [[TMP2]]
69; CHECK-NEXT:    ret void
70;
71entry:
72  br label %block_1
73
74block_0:
75  %0 = sub i32 %a, %b
76  %1 = add i32 1, %4
77  %2 = add i32 %0, %0
78  %3 = icmp sgt i32 %0, %0
79  br i1 %3, label %block_1, label %block_2
80
81block_1:
82  %4 = phi i32 [ %1, %block_0 ], [ 0, %entry ]
83  %5 = add i32 %b, %b
84  br label %block_0
85
86block_2:
87  %6 = sub i32 %2, %2
88  ret void
89}
90