1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -passes=verify,iroutliner -no-ir-sim-branch-matching -ir-outlining-no-cost < %s | FileCheck %s 3 4; Show that we do not extract sections with branches as it would require extra 5; label and control flow checking. 6 7define void @function1() { 8; CHECK-LABEL: @function1( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4 11; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4 12; CHECK-NEXT: [[C:%.*]] = alloca i32, align 4 13; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]]) 14; CHECK-NEXT: br label [[NEXT:%.*]] 15; CHECK: next: 16; CHECK-NEXT: ret void 17; 18entry: 19 %a = alloca i32, align 4 20 %b = alloca i32, align 4 21 %c = alloca i32, align 4 22 store i32 2, ptr %a, align 4 23 store i32 3, ptr %b, align 4 24 store i32 4, ptr %c, align 4 25 br label %next 26next: 27 ret void 28} 29 30define void @function2() { 31; CHECK-LABEL: @function2( 32; CHECK-NEXT: entry: 33; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4 34; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4 35; CHECK-NEXT: [[C:%.*]] = alloca i32, align 4 36; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]]) 37; CHECK-NEXT: br label [[NEXT:%.*]] 38; CHECK: next: 39; CHECK-NEXT: ret void 40; 41entry: 42 %a = alloca i32, align 4 43 %b = alloca i32, align 4 44 %c = alloca i32, align 4 45 store i32 2, ptr %a, align 4 46 store i32 3, ptr %b, align 4 47 store i32 4, ptr %c, align 4 48 br label %next 49next: 50 ret void 51} 52