1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs 2; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost < %s | FileCheck %s 3 4; Make sure that each outlined region only analyzes on the incoming values in exit 5; block phi nodes that come from the outlined region. Without this, more incoming 6; values from the phi node would be considered if the incoming value is 7; included in the outlined region. This is particularly likely to happen for 8; constants. 9 10define void @f1() { 11bb1: 12 %0 = add i32 1, 2 13 %1 = add i32 3, 4 14 %2 = add i32 5, 6 15 %3 = add i32 7, 8 16 br label %bb5 17bb2: 18 %4 = mul i32 5, 4 19 br label %bb5 20placeholder: 21 %a = sub i32 5, 4 22 br label %bb5 23bb3: 24 %5 = add i32 1, 2 25 %6 = add i32 3, 4 26 %7 = add i32 5, 6 27 %8 = add i32 7, 8 28 br label %bb5 29bb4: 30 %9 = mul i32 5, 4 31 br label %bb5 32 33placeholder1: 34 %b = add i32 5, 4 35 ret void 36 37bb5: 38 %phinode = phi i32 [5, %placeholder], [5, %bb1], [5, %bb2], [4, %bb3], [4, %bb4] 39 ret void 40} 41; CHECK-LABEL: @f1( 42; CHECK-NEXT: bb1: 43; CHECK-NEXT: [[PHINODE_CE_LOC1:%.*]] = alloca i32, align 4 44; CHECK-NEXT: [[PHINODE_CE_LOC:%.*]] = alloca i32, align 4 45; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[PHINODE_CE_LOC]]) 46; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[PHINODE_CE_LOC]], i32 0) 47; CHECK-NEXT: [[PHINODE_CE_RELOAD:%.*]] = load i32, ptr [[PHINODE_CE_LOC]], align 4 48; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[PHINODE_CE_LOC]]) 49; CHECK-NEXT: br label [[BB5:%.*]] 50; CHECK: placeholder: 51; CHECK-NEXT: [[A:%.*]] = sub i32 5, 4 52; CHECK-NEXT: br label [[BB5]] 53; CHECK: bb3: 54; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[PHINODE_CE_LOC1]]) 55; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[PHINODE_CE_LOC1]], i32 1) 56; CHECK-NEXT: [[PHINODE_CE_RELOAD2:%.*]] = load i32, ptr [[PHINODE_CE_LOC1]], align 4 57; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[PHINODE_CE_LOC1]]) 58; CHECK-NEXT: br label [[BB5]] 59; CHECK: placeholder1: 60; CHECK-NEXT: [[B:%.*]] = add i32 5, 4 61; CHECK-NEXT: ret void 62; CHECK: bb5: 63; CHECK-NEXT: [[PHINODE:%.*]] = phi i32 [ 5, [[PLACEHOLDER:%.*]] ], [ [[PHINODE_CE_RELOAD]], [[BB1:%.*]] ], [ [[PHINODE_CE_RELOAD2]], [[BB3:%.*]] ] 64; CHECK-NEXT: ret void 65; 66; 67; CHECK-LABEL: define internal void @outlined_ir_func_0( 68; CHECK-NEXT: newFuncRoot: 69; CHECK-NEXT: br label [[BB1_TO_OUTLINE:%.*]] 70; CHECK: bb1_to_outline: 71; CHECK-NEXT: [[TMP2:%.*]] = add i32 1, 2 72; CHECK-NEXT: [[TMP3:%.*]] = add i32 3, 4 73; CHECK-NEXT: [[TMP4:%.*]] = add i32 5, 6 74; CHECK-NEXT: [[TMP5:%.*]] = add i32 7, 8 75; CHECK-NEXT: br label [[BB5_SPLIT:%.*]] 76; CHECK: bb2: 77; CHECK-NEXT: [[TMP6:%.*]] = mul i32 5, 4 78; CHECK-NEXT: br label [[BB5_SPLIT]] 79; CHECK: bb5.split: 80; CHECK-NEXT: [[TMP7:%.*]] = phi i32 [ 4, [[BB1_TO_OUTLINE]] ], [ 4, [[BB2:%.*]] ] 81; CHECK-NEXT: [[PHINODE_CE:%.*]] = phi i32 [ 5, [[BB1_TO_OUTLINE]] ], [ 5, [[BB2]] ] 82; CHECK-NEXT: br label [[BB5_EXITSTUB:%.*]] 83; CHECK: bb5.exitStub: 84; CHECK-NEXT: switch i32 [[TMP1:%.*]], label [[FINAL_BLOCK_0:%.*]] [ 85; CHECK-NEXT: i32 0, label [[OUTPUT_BLOCK_0_0:%.*]] 86; CHECK-NEXT: i32 1, label [[OUTPUT_BLOCK_1_0:%.*]] 87; CHECK-NEXT: ] 88; CHECK: output_block_0_0: 89; CHECK-NEXT: store i32 [[PHINODE_CE]], ptr [[TMP0:%.*]], align 4 90; CHECK-NEXT: br label [[FINAL_BLOCK_0]] 91; CHECK: output_block_1_0: 92; CHECK-NEXT: store i32 [[TMP7]], ptr [[TMP0]], align 4 93; CHECK-NEXT: br label [[FINAL_BLOCK_0]] 94; CHECK: final_block_0: 95; CHECK-NEXT: ret void 96; 97