xref: /llvm-project/llvm/test/Transforms/GVNHoist/pr37445.ll (revision 055fb7795aa219a3d274d280ec9129784f169f56)
1; RUN: opt < %s -passes='early-cse<memssa>,gvn-hoist' -earlycse-debug-hash -S | FileCheck %s
2
3; Make sure opt won't crash and that this pair of
4; instructions (load, icmp) are not hoisted.
5; Although it is safe to hoist the loads from bb45 to
6; bb41, gvn-hoist does not have appropriate mechanism
7; to handle corner cases (see PR46874) when these instructions
8; were hoisted.
9; FIXME: Hoist loads from bb58 and bb45 to bb41.
10
11@g_10 = external global i32, align 4
12@g_536 = external global ptr, align 8
13@g_1629 = external global ptr, align 8
14@g_963 = external global ptr, align 8
15@g_1276 = external global ptr, align 8
16
17;CHECK-LABEL: @func_22
18
19define void @func_22(ptr %arg, ptr %arg1) {
20bb:
21  br label %bb12
22
23bb12:
24  %tmp3.0 = phi i32 [ undef, %bb ], [ %tmp40, %bb36 ]
25  %tmp7.0 = phi i32 [ undef, %bb ], [ %spec.select, %bb36 ]
26  %tmp14 = icmp eq i32 %tmp3.0, 6
27  br i1 %tmp14, label %bb41, label %bb15
28
29bb15:
30  %tmp183 = trunc i16 0 to i8
31  %tmp20 = load ptr, ptr @g_536, align 8
32  %tmp21 = load i8, ptr %tmp20, align 1
33  %tmp23 = or i8 %tmp21, %tmp183
34  store i8 %tmp23, ptr %tmp20, align 1
35  %tmp5.i = icmp eq i8 %tmp23, 0
36  br i1 %tmp5.i, label %safe_div_func_uint8_t_u_u.exit, label %bb8.i
37
38bb8.i:
39  %0 = udiv i8 1, %tmp23
40  br label %safe_div_func_uint8_t_u_u.exit
41
42safe_div_func_uint8_t_u_u.exit:
43  %tmp13.in.i = phi i8 [ %0, %bb8.i ], [ 1, %bb15 ]
44  %tmp31 = icmp eq i8 %tmp13.in.i, 0
45  %spec.select = select i1 %tmp31, i32 %tmp7.0, i32 53
46  %tmp35 = icmp eq i32 %spec.select, 0
47  br i1 %tmp35, label %bb36, label %bb41
48
49bb36:
50  %tmp38 = sext i32 %tmp3.0 to i64
51  %tmp40 = trunc i64 %tmp38 to i32
52  br label %bb12
53
54;CHECK: bb41:
55
56bb41:
57  %tmp43 = load i32, ptr %arg, align 4
58  %tmp44 = icmp eq i32 %tmp43, 0
59  br i1 %tmp44, label %bb52, label %bb45
60
61;CHECK:     bb45:
62;CHECK:   %tmp47 = load i32, ptr %arg1, align 4
63;CHECK:   %tmp48 = icmp eq i32 %tmp47, 0
64
65bb45:
66  %tmp47 = load i32, ptr %arg1, align 4
67  %tmp48 = icmp eq i32 %tmp47, 0
68  br i1 %tmp48, label %bb50, label %bb64
69
70bb50:
71  %tmp51 = load volatile ptr, ptr @g_963, align 8
72  unreachable
73
74bb52:
75  %tmp8.0 = phi i32 [ undef, %bb41 ], [ %tmp57, %bb55 ]
76  %tmp54 = icmp slt i32 %tmp8.0, 3
77  br i1 %tmp54, label %bb55, label %bb58
78
79bb55:
80  %tmp57 = add nsw i32 %tmp8.0, 1
81  br label %bb52
82
83;CHECK: bb58:
84;CHECK: %tmp60 = load i32, ptr %arg1, align 4
85;CHECK: %tmp61 = icmp eq i32 %tmp60, 0
86;CHECK: bb62:
87;CHECK: load
88;CHECK: bb64:
89;CHECK: load
90
91bb58:
92  %tmp60 = load i32, ptr %arg1, align 4
93  %tmp61 = icmp eq i32 %tmp60, 0
94  br i1 %tmp61, label %bb62, label %bb64
95
96bb62:
97  %tmp63 = load volatile ptr, ptr @g_1276, align 8
98  unreachable
99
100bb64:
101  %tmp65 = load volatile ptr, ptr @g_1629, align 8
102  unreachable
103
104; uselistorder directives
105  uselistorder i32 %spec.select, { 1, 0 }
106  uselistorder ptr %arg1, { 1, 0 }
107  uselistorder label %bb64, { 1, 0 }
108  uselistorder label %bb52, { 1, 0 }
109  uselistorder label %bb41, { 1, 0 }
110  uselistorder label %safe_div_func_uint8_t_u_u.exit, { 1, 0 }
111}
112
113define zeroext i8 @safe_div_func_uint8_t_u_u(i8 zeroext %arg, i8 zeroext %arg1) {
114bb:
115  %tmp5 = icmp eq i8 %arg1, 0
116  br i1 %tmp5, label %bb12, label %bb8
117
118bb8:
119  %0 = udiv i8 %arg, %arg1
120  br label %bb12
121
122bb12:
123  %tmp13.in = phi i8 [ %0, %bb8 ], [ %arg, %bb ]
124  ret i8 %tmp13.in
125}
126