1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=gvn -enable-split-backedge-in-load-pre -S %s | FileCheck %s 3 4; Test case for PR31651. 5 6target datalayout = "p:16:16" 7 8declare void @use(i16) readonly 9 10define i16 @test_PR31651(ptr %ub.16) { 11; CHECK-LABEL: @test_PR31651( 12; CHECK-NEXT: br label [[LOOP_1_HEADER:%.*]] 13; CHECK: loop.1.header: 14; CHECK-NEXT: [[IV_1:%.*]] = phi i16 [ 0, [[TMP0:%.*]] ], [ [[IV_1_NEXT:%.*]], [[LOOP_1_LATCH:%.*]] ] 15; CHECK-NEXT: [[CMP_1:%.*]] = icmp eq i16 [[IV_1]], 0 16; CHECK-NEXT: br i1 [[CMP_1]], label [[CONT_1:%.*]], label [[THEN_1:%.*]] 17; CHECK: then.1: 18; CHECK-NEXT: [[_TMP18:%.*]] = add i16 [[IV_1]], -1 19; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr [4 x i16], ptr [[UB_16:%.*]], i16 1, i16 [[_TMP18]] 20; CHECK-NEXT: [[L_1:%.*]] = load i16, ptr [[GEP_1]], align 2 21; CHECK-NEXT: br label [[CONT_1]] 22; CHECK: cont.1: 23; CHECK-NEXT: [[IV_1_SINK:%.*]] = phi i16 [ [[IV_1]], [[THEN_1]] ], [ 0, [[LOOP_1_HEADER]] ] 24; CHECK-NEXT: [[SINK:%.*]] = phi i16 [ [[L_1]], [[THEN_1]] ], [ 10, [[LOOP_1_HEADER]] ] 25; CHECK-NEXT: [[GEP_2:%.*]] = getelementptr [4 x i16], ptr [[UB_16]], i16 1, i16 [[IV_1_SINK]] 26; CHECK-NEXT: br i1 [[CMP_1]], label [[THEN_2:%.*]], label [[ELSE_2:%.*]] 27; CHECK: then.2: 28; CHECK-NEXT: [[GEP_3:%.*]] = getelementptr [4 x i16], ptr [[UB_16]], i16 1, i16 0 29; CHECK-NEXT: [[L_2:%.*]] = load i16, ptr [[GEP_3]], align 2 30; CHECK-NEXT: call void @use(i16 [[L_2]]) 31; CHECK-NEXT: br label [[LOOP_1_LATCH]] 32; CHECK: else.2: 33; CHECK-NEXT: [[GEP_4:%.*]] = getelementptr [4 x i16], ptr [[UB_16]], i16 1, i16 [[IV_1]] 34; CHECK-NEXT: [[L_3:%.*]] = load i16, ptr [[GEP_4]], align 2 35; CHECK-NEXT: call void @use(i16 [[L_3]]) 36; CHECK-NEXT: br label [[LOOP_1_LATCH]] 37; CHECK: loop.1.latch: 38; CHECK-NEXT: [[IV_1_NEXT]] = add i16 [[IV_1]], 1 39; CHECK-NEXT: [[CMP_3:%.*]] = icmp slt i16 [[IV_1_NEXT]], 2 40; CHECK-NEXT: br i1 [[CMP_3]], label [[LOOP_1_HEADER]], label [[LOOP_2:%.*]] 41; CHECK: loop.2: 42; CHECK-NEXT: [[IV_2:%.*]] = phi i16 [ 0, [[LOOP_1_LATCH]] ], [ [[IV_2_NEXT:%.*]], [[LOOP_2]] ] 43; CHECK-NEXT: [[SUM:%.*]] = phi i16 [ 0, [[LOOP_1_LATCH]] ], [ [[SUM_NEXT:%.*]], [[LOOP_2]] ] 44; CHECK-NEXT: [[GEP_5:%.*]] = getelementptr [4 x i16], ptr [[UB_16]], i16 1, i16 [[IV_2]] 45; CHECK-NEXT: [[L_4:%.*]] = load i16, ptr [[GEP_5]], align 2 46; CHECK-NEXT: [[SUM_NEXT]] = add i16 [[SUM]], [[L_4]] 47; CHECK-NEXT: [[IV_2_NEXT]] = add i16 [[IV_2]], 1 48; CHECK-NEXT: [[CMP_4:%.*]] = icmp slt i16 [[IV_2_NEXT]], 2 49; CHECK-NEXT: br i1 [[CMP_4]], label [[LOOP_2]], label [[EXIT:%.*]] 50; CHECK: exit: 51; CHECK-NEXT: ret i16 [[SUM_NEXT]] 52; 53 br label %loop.1.header 54 55loop.1.header: 56 %iv.1 = phi i16 [ 0, %0 ], [ %iv.1.next, %loop.1.latch ] 57 %cmp.1 = icmp eq i16 %iv.1, 0 58 br i1 %cmp.1 , label %cont.1, label %then.1 59 60then.1: 61 %_tmp18 = add i16 %iv.1, -1 62 %gep.1 = getelementptr [4 x i16], ptr %ub.16, i16 1, i16 %_tmp18 63 %l.1 = load i16, ptr %gep.1, align 2 64 br label %cont.1 65 66cont.1: 67 %iv.1.sink = phi i16 [ %iv.1, %then.1 ], [ 0, %loop.1.header ] 68 %sink = phi i16 [ %l.1, %then.1 ], [ 10, %loop.1.header ] 69 %gep.2 = getelementptr [4 x i16], ptr %ub.16, i16 1, i16 %iv.1.sink 70 %cmp.2 = icmp eq i16 %iv.1, 0 71 br i1 %cmp.2, label %then.2, label %else.2 72 73then.2: 74 %gep.3 = getelementptr [4 x i16], ptr %ub.16, i16 1, i16 %iv.1 75 %l.2 = load i16, ptr %gep.3, align 2 76 call void @use(i16 %l.2) 77 br label %loop.1.latch 78 79else.2: 80 %gep.4 = getelementptr [4 x i16], ptr %ub.16, i16 1, i16 %iv.1 81 %l.3 = load i16, ptr %gep.4, align 2 82 call void @use(i16 %l.3) 83 br label %loop.1.latch 84 85loop.1.latch: 86 %iv.1.next = add i16 %iv.1, 1 87 %cmp.3 = icmp slt i16 %iv.1.next, 2 88 br i1 %cmp.3, label %loop.1.header, label %loop.2 89 90loop.2: 91 %iv.2 = phi i16 [ 0, %loop.1.latch ], [ %iv.2.next, %loop.2 ] 92 %sum = phi i16 [ 0, %loop.1.latch ], [ %sum.next, %loop.2 ] 93 %gep.5 = getelementptr [4 x i16], ptr %ub.16, i16 1, i16 %iv.2 94 %l.4 = load i16, ptr %gep.5, align 2 95 %sum.next = add i16 %sum, %l.4 96 %iv.2.next = add i16 %iv.2, 1 97 %cmp.4 = icmp slt i16 %iv.2.next, 2 98 br i1 %cmp.4, label %loop.2, label %exit 99 100exit: 101 ret i16 %sum.next 102 103 uselistorder ptr %ub.16, { 4, 3, 2, 0, 1 } 104} 105