1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=gvn -enable-load-pre -S | FileCheck %s 3; RUN: opt < %s -aa-pipeline=basic-aa -passes=gvn -enable-load-pre -S | FileCheck %s 4; RUN: opt < %s -aa-pipeline=basic-aa -passes="gvn<load-pre>" -enable-load-pre=false -S | FileCheck %s 5 6target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" 7target triple = "aarch64--linux-gnu" 8 9define double @foo(i32 %stat, i32 %i, ptr %p) { 10; CHECK-LABEL: @foo( 11; CHECK-NEXT: entry: 12; CHECK-NEXT: switch i32 [[STAT:%.*]], label [[SW_DEFAULT:%.*]] [ 13; CHECK-NEXT: i32 0, label [[SW_BB:%.*]] 14; CHECK-NEXT: i32 1, label [[SW_BB]] 15; CHECK-NEXT: i32 2, label [[ENTRY_SW_BB2_CRIT_EDGE:%.*]] 16; CHECK-NEXT: ] 17; CHECK: entry.sw.bb2_crit_edge: 18; CHECK-NEXT: [[DOTPRE:%.*]] = load ptr, ptr [[P:%.*]], align 8 19; CHECK-NEXT: [[DOTPRE1:%.*]] = sext i32 [[I:%.*]] to i64 20; CHECK-NEXT: [[ARRAYIDX5_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds double, ptr [[DOTPRE]], i64 [[DOTPRE1]] 21; CHECK-NEXT: [[DOTPRE2:%.*]] = load double, ptr [[ARRAYIDX5_PHI_TRANS_INSERT]], align 8 22; CHECK-NEXT: br label [[SW_BB2:%.*]] 23; CHECK: sw.bb: 24; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[I]] to i64 25; CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[P]], align 8 26; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, ptr [[TMP0]], i64 [[IDXPROM]] 27; CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[ARRAYIDX1]], align 8 28; CHECK-NEXT: [[SUB:%.*]] = fsub double [[TMP1]], 1.000000e+00 29; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[SUB]], 0.000000e+00 30; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 31; CHECK: if.then: 32; CHECK-NEXT: br label [[RETURN:%.*]] 33; CHECK: if.end: 34; CHECK-NEXT: br label [[SW_BB2]] 35; CHECK: sw.bb2: 36; CHECK-NEXT: [[TMP2:%.*]] = phi double [ [[DOTPRE2]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[TMP1]], [[IF_END]] ] 37; CHECK-NEXT: [[IDXPROM3_PRE_PHI:%.*]] = phi i64 [ [[DOTPRE1]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[IDXPROM]], [[IF_END]] ] 38; CHECK-NEXT: [[TMP3:%.*]] = phi ptr [ [[DOTPRE]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[TMP0]], [[IF_END]] ] 39; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, ptr [[TMP3]], i64 [[IDXPROM3_PRE_PHI]] 40; CHECK-NEXT: [[SUB6:%.*]] = fsub double 3.000000e+00, [[TMP2]] 41; CHECK-NEXT: store double [[SUB6]], ptr [[ARRAYIDX5]], align 8 42; CHECK-NEXT: br label [[RETURN]] 43; CHECK: sw.default: 44; CHECK-NEXT: br label [[RETURN]] 45; CHECK: return: 46; CHECK-NEXT: [[RETVAL_0:%.*]] = phi double [ 0.000000e+00, [[SW_DEFAULT]] ], [ [[SUB6]], [[SW_BB2]] ], [ [[SUB]], [[IF_THEN]] ] 47; CHECK-NEXT: ret double [[RETVAL_0]] 48; 49entry: 50 switch i32 %stat, label %sw.default [ 51 i32 0, label %sw.bb 52 i32 1, label %sw.bb 53 i32 2, label %sw.bb2 54 ] 55 56sw.bb: ; preds = %entry, %entry 57 %idxprom = sext i32 %i to i64 58 %0 = load ptr, ptr %p, align 8 59 %arrayidx1 = getelementptr inbounds double, ptr %0, i64 %idxprom 60 %1 = load double, ptr %arrayidx1, align 8 61 %sub = fsub double %1, 1.000000e+00 62 %cmp = fcmp olt double %sub, 0.000000e+00 63 br i1 %cmp, label %if.then, label %if.end 64 65if.then: ; preds = %sw.bb 66 br label %return 67 68if.end: ; preds = %sw.bb 69 br label %sw.bb2 70 71sw.bb2: ; preds = %if.end, %entry 72 %idxprom3 = sext i32 %i to i64 73 %2 = load ptr, ptr %p, align 8 74 %arrayidx5 = getelementptr inbounds double, ptr %2, i64 %idxprom3 75 %3 = load double, ptr %arrayidx5, align 8 76 %sub6 = fsub double 3.000000e+00, %3 77 store double %sub6, ptr %arrayidx5 78 br label %return 79 80sw.default: ; preds = %entry 81 br label %return 82 83return: ; preds = %sw.default, %sw.bb2, %if.then 84 %retval.0 = phi double [ 0.000000e+00, %sw.default ], [ %sub6, %sw.bb2 ], [ %sub, %if.then ] 85 ret double %retval.0 86} 87 88; The load causes the GEP's operands to be PREd earlier than normal. The 89; resulting sext ends up in pre.dest and in the GVN system before that BB is 90; actually processed. Make sure we can deal with the situation. 91 92define void @test_shortcut_safe(i1 %tst, i32 %p1, ptr %a) { 93; CHECK-LABEL: @test_shortcut_safe( 94; CHECK-NEXT: br i1 [[TST:%.*]], label [[SEXT1:%.*]], label [[PRE_DEST:%.*]] 95; CHECK: pre.dest: 96; CHECK-NEXT: br label [[SEXT_USE:%.*]] 97; CHECK: sext1: 98; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[P1:%.*]] to i64 99; CHECK-NEXT: br label [[SEXT_USE]] 100; CHECK: sext.use: 101; CHECK-NEXT: [[IDXPROM2:%.*]] = sext i32 [[P1]] to i64 102; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[IDXPROM2]] 103; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[ARRAYIDX3]], align 4 104; CHECK-NEXT: tail call void @g(i32 [[VAL]]) 105; CHECK-NEXT: br label [[PRE_DEST]] 106; 107 108 br i1 %tst, label %sext1, label %pre.dest 109 110pre.dest: 111 br label %sext.use 112 113sext1: 114 %idxprom = sext i32 %p1 to i64 115 br label %sext.use 116 117sext.use: 118 %idxprom2 = sext i32 %p1 to i64 119 %arrayidx3 = getelementptr inbounds i32, ptr %a, i64 %idxprom2 120 %val = load i32, ptr %arrayidx3, align 4 121 tail call void (i32) @g(i32 %val) 122 br label %pre.dest 123} 124 125declare void @g(i32) 126