xref: /llvm-project/llvm/test/Transforms/EarlyCSE/AMDGPU/intrinsics.ll (revision ac696ac4530fb3df626195e94e83649bf7114754) 
1; RUN: opt < %s -S -mtriple=amdgcn-- -passes=early-cse -earlycse-debug-hash | FileCheck %s
2
3; CHECK-LABEL: @no_cse
4; CHECK: call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %in, i32 0, i32 0)
5; CHECK: call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %in, i32 4, i32 0)
6define void @no_cse(ptr addrspace(1) %out, <4 x i32> %in) {
7  %a = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %in, i32 0, i32 0)
8  %b = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %in, i32 4, i32 0)
9  %c = add i32 %a, %b
10  store i32 %c, ptr addrspace(1) %out
11  ret void
12}
13
14; CHECK-LABEL: @cse_zero_offset
15; CHECK: [[CSE:%[a-z0-9A-Z]+]] = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %in, i32 0, i32 0)
16; CHECK: add i32 [[CSE]], [[CSE]]
17define void @cse_zero_offset(ptr addrspace(1) %out, <4 x i32> %in) {
18  %a = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %in, i32 0, i32 0)
19  %b = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %in, i32 0, i32 0)
20  %c = add i32 %a, %b
21  store i32 %c, ptr addrspace(1) %out
22  ret void
23}
24
25; CHECK-LABEL: @cse_nonzero_offset
26; CHECK: [[CSE:%[a-z0-9A-Z]+]] = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %in, i32 4, i32 0)
27; CHECK: add i32 [[CSE]], [[CSE]]
28define void @cse_nonzero_offset(ptr addrspace(1) %out, <4 x i32> %in) {
29  %a = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %in, i32 4, i32 0)
30  %b = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %in, i32 4, i32 0)
31  %c = add i32 %a, %b
32  store i32 %c, ptr addrspace(1) %out
33  ret void
34}
35
36declare i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> nocapture, i32, i32)
37