1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s 3 4declare void @llvm.assume(i1) 5 6define i1 @sge_0_unsigned_a_ne_0(i8 %a) { 7; CHECK-LABEL: @sge_0_unsigned_a_ne_0( 8; CHECK-NEXT: [[A_NE_0:%.*]] = icmp ne i8 [[A:%.*]], 0 9; CHECK-NEXT: call void @llvm.assume(i1 [[A_NE_0]]) 10; CHECK-NEXT: [[EXT:%.*]] = zext i8 [[A]] to i16 11; CHECK-NEXT: ret i1 true 12; 13 %a.ne.0 = icmp ne i8 %a, 0 14 call void @llvm.assume(i1 %a.ne.0) 15 %ext = zext i8 %a to i16 16 %t = icmp sge i16 %ext, 0 17 ret i1 %t 18} 19 20define i1 @sgt_0_unsigned_a_ne_0(i8 %a) { 21; CHECK-LABEL: @sgt_0_unsigned_a_ne_0( 22; CHECK-NEXT: [[A_NE_0:%.*]] = icmp ne i8 [[A:%.*]], 0 23; CHECK-NEXT: call void @llvm.assume(i1 [[A_NE_0]]) 24; CHECK-NEXT: [[EXT:%.*]] = zext i8 [[A]] to i16 25; CHECK-NEXT: ret i1 true 26; 27 %a.ne.0 = icmp ne i8 %a, 0 28 call void @llvm.assume(i1 %a.ne.0) 29 %ext = zext i8 %a to i16 30 %t = icmp sgt i16 %ext, 0 31 ret i1 %t 32} 33 34define i1 @sgt_0_unsigned_a_sgt_0(i8 %a) { 35; CHECK-LABEL: @sgt_0_unsigned_a_sgt_0( 36; CHECK-NEXT: [[A_SGT_0:%.*]] = icmp sgt i8 [[A:%.*]], 0 37; CHECK-NEXT: call void @llvm.assume(i1 [[A_SGT_0]]) 38; CHECK-NEXT: [[EXT:%.*]] = zext i8 [[A]] to i16 39; CHECK-NEXT: ret i1 true 40; 41 %a.sgt.0 = icmp sgt i8 %a, 0 42 call void @llvm.assume(i1 %a.sgt.0) 43 %ext = zext i8 %a to i16 44 %t = icmp sgt i16 %ext, 0 45 ret i1 %t 46} 47 48define i1 @sge_0_unsigned_a_sge_0(i8 %a) { 49; CHECK-LABEL: @sge_0_unsigned_a_sge_0( 50; CHECK-NEXT: [[A_SGE_0:%.*]] = icmp sge i8 [[A:%.*]], 0 51; CHECK-NEXT: call void @llvm.assume(i1 [[A_SGE_0]]) 52; CHECK-NEXT: [[EXT:%.*]] = zext i8 [[A]] to i16 53; CHECK-NEXT: ret i1 true 54; 55 %a.sge.0 = icmp sge i8 %a, 0 56 call void @llvm.assume(i1 %a.sge.0) 57 %ext = zext i8 %a to i16 58 %t = icmp sge i16 %ext, 0 59 ret i1 %t 60} 61 62define i1 @sgt_0_unsigned_a_ugt_0(i8 %a) { 63; CHECK-LABEL: @sgt_0_unsigned_a_ugt_0( 64; CHECK-NEXT: [[A_UGT_0:%.*]] = icmp ugt i8 [[A:%.*]], 0 65; CHECK-NEXT: call void @llvm.assume(i1 [[A_UGT_0]]) 66; CHECK-NEXT: [[EXT:%.*]] = zext i8 [[A]] to i16 67; CHECK-NEXT: ret i1 true 68; 69 %a.ugt.0 = icmp ugt i8 %a, 0 70 call void @llvm.assume(i1 %a.ugt.0) 71 %ext = zext i8 %a to i16 72 %t = icmp sgt i16 %ext, 0 73 ret i1 %t 74} 75 76define i1 @sgt_1_unsigned_a_ne_0(i8 %a) { 77; CHECK-LABEL: @sgt_1_unsigned_a_ne_0( 78; CHECK-NEXT: [[A_NE_0:%.*]] = icmp ne i8 [[A:%.*]], 0 79; CHECK-NEXT: call void @llvm.assume(i1 [[A_NE_0]]) 80; CHECK-NEXT: [[EXT:%.*]] = zext i8 [[A]] to i16 81; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[EXT]], 1 82; CHECK-NEXT: ret i1 [[CMP]] 83; 84 %a.ne.0 = icmp ne i8 %a, 0 85 call void @llvm.assume(i1 %a.ne.0) 86 %ext = zext i8 %a to i16 87 %cmp = icmp sgt i16 %ext, 1 88 ret i1 %cmp 89} 90 91define i1 @sgt_1_unsigned_a_ugt_1(i8 %a) { 92; CHECK-LABEL: @sgt_1_unsigned_a_ugt_1( 93; CHECK-NEXT: [[A_UGT_1:%.*]] = icmp ugt i8 [[A:%.*]], 1 94; CHECK-NEXT: call void @llvm.assume(i1 [[A_UGT_1]]) 95; CHECK-NEXT: [[EXT:%.*]] = zext i8 [[A]] to i16 96; CHECK-NEXT: ret i1 true 97; 98 %a.ugt.1 = icmp ugt i8 %a, 1 99 call void @llvm.assume(i1 %a.ugt.1) 100 %ext = zext i8 %a to i16 101 %t = icmp sgt i16 %ext, 1 102 ret i1 %t 103} 104 105define i1 @sge_no_const_unsigned_uge(i8 %a, i16 %b) { 106; CHECK-LABEL: @sge_no_const_unsigned_uge( 107; CHECK-NEXT: [[EXT:%.*]] = zext i8 [[A:%.*]] to i16 108; CHECK-NEXT: [[A_UGE_B:%.*]] = icmp uge i16 [[EXT]], [[B:%.*]] 109; CHECK-NEXT: call void @llvm.assume(i1 [[A_UGE_B]]) 110; CHECK-NEXT: [[B_POS:%.*]] = icmp sge i16 [[B]], 0 111; CHECK-NEXT: call void @llvm.assume(i1 [[B_POS]]) 112; CHECK-NEXT: ret i1 true 113; 114 %ext = zext i8 %a to i16 115 %a.uge.b = icmp uge i16 %ext, %b 116 call void @llvm.assume(i1 %a.uge.b) 117 118 %b.pos = icmp sge i16 %b, 0 119 call void @llvm.assume(i1 %b.pos) 120 %cmp = icmp sge i16 %ext, %b 121 ret i1 %cmp 122} 123 124define i1 @sgt_0_unsigned_a_ugt_neg_10(i8 %a) { 125; CHECK-LABEL: @sgt_0_unsigned_a_ugt_neg_10( 126; CHECK-NEXT: [[A_UGT_0:%.*]] = icmp ugt i8 [[A:%.*]], 10 127; CHECK-NEXT: call void @llvm.assume(i1 [[A_UGT_0]]) 128; CHECK-NEXT: [[EXT:%.*]] = zext i8 [[A]] to i16 129; CHECK-NEXT: ret i1 true 130; 131 %a.ugt.0 = icmp ugt i8 %a, 10 132 call void @llvm.assume(i1 %a.ugt.0) 133 %ext = zext i8 %a to i16 134 %cmp = icmp sgt i16 %ext, 0 135 ret i1 %cmp 136} 137 138define i1 @sge_neg_1_sge_0_known(i8 %a) { 139; CHECK-LABEL: @sge_neg_1_sge_0_known( 140; CHECK-NEXT: [[EXT:%.*]] = zext i8 [[A:%.*]] to i16 141; CHECK-NEXT: [[A_NE_0:%.*]] = icmp sge i16 [[EXT]], 0 142; CHECK-NEXT: call void @llvm.assume(i1 [[A_NE_0]]) 143; CHECK-NEXT: ret i1 true 144; 145 %ext = zext i8 %a to i16 146 %a.ne.0 = icmp sge i16 %ext, 0 147 call void @llvm.assume(i1 %a.ne.0) 148 %t = icmp sge i16 %ext, -1 149 ret i1 %t 150} 151