xref: /llvm-project/llvm/test/Transforms/ConstantHoisting/ARM/is-legal-addressing-imm.ll (revision 055fb7795aa219a3d274d280ec9129784f169f56)
1; RUN: opt -passes=consthoist -S -o - %s | FileCheck %s
2target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
3target triple = "thumbv6m-none--musleabi"
4
5; Check that for i8 type, the maximum legal offset is 31.
6; Also check that an constant used as value to be stored rather than
7; pointer in a store instruction is hoisted.
8; CHECK: foo_i8
9; CHECK-DAG:  %[[C1:const[0-9]?]] = bitcast i32 805874720 to i32
10; CHECK-DAG:  %[[C2:const[0-9]?]] = bitcast i32 805874688 to i32
11; CHECK-DAG:  %[[C3:const[0-9]?]] = bitcast i32 805873720 to i32
12; CHECK-DAG:  %[[C4:const[0-9]?]] = bitcast i32 805873688 to i32
13; CHECK:  %0 = inttoptr i32 %[[C2]] to ptr
14; CHECK-NEXT:  %1 = load volatile i8, ptr %0
15; CHECK-NEXT:  %[[M1:const_mat[0-9]?]] = add i32 %[[C2]], 4
16; CHECK-NEXT:  %2 = inttoptr i32 %[[M1]] to ptr
17; CHECK-NEXT:  %3 = load volatile i8, ptr %2
18; CHECK-NEXT:  %[[M2:const_mat[0-9]?]] = add i32 %[[C2]], 31
19; CHECK-NEXT:  %4 = inttoptr i32 %[[M2]] to ptr
20; CHECK-NEXT:  %5 = load volatile i8, ptr %4
21; CHECK-NEXT:  %6 = inttoptr i32 %[[C1]] to ptr
22; CHECK-NEXT:  %7 = load volatile i8, ptr %6
23; CHECK-NEXT:  %[[M3:const_mat[0-9]?]] = add i32 %[[C1]], 7
24; CHECK-NEXT:  %8 = inttoptr i32 %[[M3]] to ptr
25; CHECK-NEXT:  %9 = load volatile i8, ptr %8
26; CHECK-NEXT:  %10 = inttoptr i32 %[[C4]] to ptr
27; CHECK-NEXT:  store i8 %9, ptr %10
28; CHECK-NEXT:  %[[M4:const_mat[0-9]?]] = add i32 %[[C4]], 31
29; CHECK-NEXT:  %11 = inttoptr i32 %[[M4]] to ptr
30; CHECK-NEXT:  store i8 %7, ptr %11
31; CHECK-NEXT:  %12 = inttoptr i32 %[[C3]] to ptr
32; CHECK-NEXT:  store i8 %5, ptr %12
33; CHECK-NEXT:  %[[M5:const_mat[0-9]?]] = add i32 %[[C3]], 7
34; CHECK-NEXT:  %13 = inttoptr i32 %[[M5]] to ptr
35; CHECK-NEXT:  store i8 %3, ptr %13
36; CHECK-NEXT:  %[[M6:const_mat[0-9]?]] = add i32 %[[C1]], 80
37; CHECK-NEXT:  %14 = inttoptr i32 %[[M6]] to ptr
38; CHECK-NEXT:  store ptr %14, ptr @goo
39
40@goo = global ptr undef
41
42define void @foo_i8() {
43entry:
44  %0 = load volatile i8, ptr inttoptr (i32 805874688 to ptr)
45  %1 = load volatile i8, ptr inttoptr (i32 805874692 to ptr)
46  %2 = load volatile i8, ptr inttoptr (i32 805874719 to ptr)
47  %3 = load volatile i8, ptr inttoptr (i32 805874720 to ptr)
48  %4 = load volatile i8, ptr inttoptr (i32 805874727 to ptr)
49  store i8 %4, ptr inttoptr(i32 805873688 to ptr)
50  store i8 %3, ptr inttoptr(i32 805873719 to ptr)
51  store i8 %2, ptr inttoptr(i32 805873720 to ptr)
52  store i8 %1, ptr inttoptr(i32 805873727 to ptr)
53  store ptr inttoptr(i32 805874800 to ptr), ptr @goo
54  ret void
55}
56
57; Check that for i16 type, the maximum legal offset is 62.
58; CHECK: foo_i16
59; CHECK-DAG: %[[C1:const[0-9]?]] = bitcast i32 805874752 to i32
60; CHECK-DAG: %[[C2:const[0-9]?]] = bitcast i32 805874688 to i32
61; CHECK: %0 = inttoptr i32 %[[C2]] to ptr
62; CHECK-NEXT: %1 = load volatile i16, ptr %0, align 2
63; CHECK-NEXT: %[[M1:const_mat[0-9]?]] = add i32 %[[C2]], 4
64; CHECK-NEXT: %2 = inttoptr i32 %[[M1]] to ptr
65; CHECK-NEXT: %3 = load volatile i16, ptr %2, align 2
66; CHECK-NEXT: %[[M2:const_mat[0-9]?]] = add i32 %[[C2]], 32
67; CHECK-NEXT: %4 = inttoptr i32 %[[M2]] to ptr
68; CHECK-NEXT: %5 = load volatile i16, ptr %4, align 2
69; CHECK-NEXT: %[[M3:const_mat[0-9]?]] = add i32 %[[C2]], 62
70; CHECK-NEXT: %6 = inttoptr i32 %[[M3]] to ptr
71; CHECK-NEXT: %7 = load volatile i16, ptr %6, align 2
72; CHECK-NEXT: %8 = inttoptr i32 %[[C1]] to ptr
73; CHECK-NEXT: %9 = load volatile i16, ptr %8, align 2
74; CHECK-NEXT: %[[M4:const_mat[0-9]?]] = add i32 %[[C1]], 22
75; CHECK-NEXT: %10 = inttoptr i32 %[[M4]] to ptr
76; CHECK-NEXT: %11 = load volatile i16, ptr %10, align 2
77
78define void @foo_i16() {
79entry:
80  %0 = load volatile i16, ptr inttoptr (i32 805874688 to ptr), align 2
81  %1 = load volatile i16, ptr inttoptr (i32 805874692 to ptr), align 2
82  %2 = load volatile i16, ptr inttoptr (i32 805874720 to ptr), align 2
83  %3 = load volatile i16, ptr inttoptr (i32 805874750 to ptr), align 2
84  %4 = load volatile i16, ptr inttoptr (i32 805874752 to ptr), align 2
85  %5 = load volatile i16, ptr inttoptr (i32 805874774 to ptr), align 2
86  ret void
87}
88
89; Check that for i32 type, the maximum legal offset is 124.
90; CHECK: foo_i32
91; CHECK-DAG:  %[[C1:const[0-9]?]] = bitcast i32 805874816 to i32
92; CHECK-DAG:  %[[C2:const[0-9]?]] = bitcast i32 805874688 to i32
93; CHECK:  %0 = inttoptr i32 %[[C2]] to ptr
94; CHECK-NEXT:  %1 = load volatile i32, ptr %0, align 4
95; CHECK-NEXT:  %[[M1:const_mat[0-9]?]] = add i32 %[[C2]], 4
96; CHECK-NEXT:  %2 = inttoptr i32 %[[M1]] to ptr
97; CHECK-NEXT:  %3 = load volatile i32, ptr %2, align 4
98; CHECK-NEXT:  %[[M2:const_mat[0-9]?]] = add i32 %[[C2]], 124
99; CHECK-NEXT:  %4 = inttoptr i32 %[[M2]] to ptr
100; CHECK-NEXT:  %5 = load volatile i32, ptr %4, align 4
101; CHECK-NEXT:  %6 = inttoptr i32 %[[C1]] to ptr
102; CHECK-NEXT:  %7 = load volatile i32, ptr %6, align 4
103; CHECK-NEXT:  %[[M3:const_mat[0-9]?]] = add i32 %[[C1]], 8
104; CHECK-NEXT:  %8 = inttoptr i32 %[[M3]] to ptr
105; CHECK-NEXT:  %9 = load volatile i32, ptr %8, align 4
106; CHECK-NEXT:  %[[M4:const_mat[0-9]?]] = add i32 %[[C1]], 12
107; CHECK-NEXT:  %10 = inttoptr i32 %[[M4]] to ptr
108; CHECK-NEXT:  %11 = load volatile i32, ptr %10, align 4
109
110define void @foo_i32() {
111entry:
112  %0 = load volatile i32, ptr inttoptr (i32 805874688 to ptr), align 4
113  %1 = load volatile i32, ptr inttoptr (i32 805874692 to ptr), align 4
114  %2 = load volatile i32, ptr inttoptr (i32 805874812 to ptr), align 4
115  %3 = load volatile i32, ptr inttoptr (i32 805874816 to ptr), align 4
116  %4 = load volatile i32, ptr inttoptr (i32 805874824 to ptr), align 4
117  %5 = load volatile i32, ptr inttoptr (i32 805874828 to ptr), align 4
118  ret void
119}
120
121