xref: /llvm-project/llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-introduce-addrspacecast.ll (revision f1ec0d12bb0843f0deab83ef2b5cf1339cbc4f0b)
1; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' < %s | FileCheck %s
2
3target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
4target triple = "nvptx64-nvidia-cuda"
5
6
7; ptrtoint/inttoptr combinations can introduce semantically-meaningful address space casts
8; which we can't sink into an addrspacecast
9
10; CHECK-LABEL: @test
11define void @test(ptr %input_ptr) {
12  ; CHECK-LABEL: l1:
13  ; CHECK-NOT: addrspacecast
14  %intptr = ptrtoint ptr %input_ptr to i64
15  %ptr = inttoptr i64 %intptr to ptr addrspace(3)
16
17  br label %l1
18l1:
19
20  store atomic i32 1, ptr addrspace(3) %ptr unordered, align 4
21  ret void
22}
23
24
25; we still should be able to look through multiple sequences of inttoptr/ptrtoint
26
27; CHECK-LABEL: @test2
28define void @test2(ptr %input_ptr) {
29  ; CHECK-LABEL: l2:
30  ; CHECK-NEXT: store
31  %intptr = ptrtoint ptr %input_ptr to i64
32  %ptr = inttoptr i64 %intptr to ptr addrspace(3)
33
34  %intptr2 = ptrtoint ptr addrspace(3) %ptr to i64
35  %ptr2 = inttoptr i64 %intptr2 to ptr
36
37  br label %l2
38l2:
39
40  store atomic i32 1, ptr %ptr2 unordered, align 4
41  ret void
42}
43