xref: /llvm-project/llvm/test/Transforms/Attributor/cgscc_bugs.ll (revision 6fa8244eb6cc4d2a079c347f7c44d842fc83a913)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
2; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal  -attributor-annotate-decl-cs  -S < %s | FileCheck %s --check-prefixes=CHECK,TUNIT
3; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal  -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,CGSCC
4
5target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
6
7%0 = type { i32, %1, ptr }
8%1 = type { i32 }
9%2 = type opaque
10
11define hidden ptr @f1(i64 %0, i64 %1) {
12; CHECK-LABEL: define {{[^@]+}}@f1
13; CHECK-SAME: (i64 [[TMP0:%.*]], i64 [[TMP1:%.*]]) {
14; CHECK-NEXT:    [[TMP3:%.*]] = call { ptr, i64 } @f3(i64 [[TMP0]])
15; CHECK-NEXT:    ret ptr undef
16;
17  %3 = call { ptr, i64 } @f3(i64 %0)
18  ret ptr undef
19}
20
21define linkonce_odr hidden { ptr, i64 } @f3(i64 %0) align 2 {
22; CHECK-LABEL: define {{[^@]+}}@f3
23; CHECK-SAME: (i64 [[TMP0:%.*]]) align 2 {
24; CHECK-NEXT:    [[TMP2:%.*]] = call i32 @f4()
25; CHECK-NEXT:    [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
26; CHECK-NEXT:    call void @f5(i64 [[TMP3]], i64 [[TMP0]]) #[[ATTR2:[0-9]+]]
27; CHECK-NEXT:    ret { ptr, i64 } undef
28;
29  %2 = call i32 @f4()
30  %3 = zext i32 %2 to i64
31  call void @f5(i64 %3, i64 %0)
32  ret { ptr, i64 } undef
33}
34
35define linkonce_odr hidden i32 @f4() align 2 {
36; CHECK-LABEL: define {{[^@]+}}@f4() align 2 {
37; CHECK-NEXT:    ret i32 16
38;
39  ret i32 16
40}
41
42define internal void @f5(i64 %0, i64 %1) {
43; CHECK: Function Attrs: nounwind memory(inaccessiblemem: write)
44; CHECK-LABEL: define {{[^@]+}}@f5
45; CHECK-SAME: (i64 [[TMP0:%.*]], i64 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
46; CHECK-NEXT:    br label [[TMP3:%.*]]
47; CHECK:       3:
48; CHECK-NEXT:    call void @f6(i64 [[TMP0]]) #[[ATTR2]]
49; CHECK-NEXT:    [[TMP4:%.*]] = icmp sgt i64 [[TMP1]], [[TMP0]]
50; CHECK-NEXT:    br i1 [[TMP4]], label [[TMP5:%.*]], label [[TMP6:%.*]]
51; CHECK:       5:
52; CHECK-NEXT:    ret void
53; CHECK:       6:
54; CHECK-NEXT:    call void @f5(i64 [[TMP0]], i64 [[TMP1]]) #[[ATTR2]]
55; CHECK-NEXT:    br label [[TMP3]]
56;
57  br label %3
58
593:                                                ; preds = %6, %2
60  call void @f6(i64 %0)
61  %4 = icmp sgt i64 %1, %0
62  br i1 %4, label %5, label %6
63
645:                                                ; preds = %3
65  ret void
66
676:                                                ; preds = %3
68  call void @f5(i64 %0, i64 %1)
69  br label %3
70}
71
72define internal void @f6(i64 %0) {
73; CHECK: Function Attrs: nounwind memory(inaccessiblemem: write)
74; CHECK-LABEL: define {{[^@]+}}@f6
75; CHECK-SAME: (i64 [[TMP0:%.*]]) #[[ATTR0]] {
76; CHECK-NEXT:    [[TMP2:%.*]] = icmp sgt i64 [[TMP0]], 0
77; CHECK-NEXT:    br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP4:%.*]]
78; CHECK:       3:
79; CHECK-NEXT:    call void @llvm.trap() #[[ATTR3:[0-9]+]]
80; CHECK-NEXT:    unreachable
81; CHECK:       4:
82; CHECK-NEXT:    ret void
83;
84  %2 = icmp sgt i64 %0, 0
85  br i1 %2, label %3, label %4
86
873:                                                ; preds = %1
88  call void @llvm.trap()
89  ret void
90
914:                                                ; preds = %1
92  ret void
93}
94
95; Function Attrs: cold noreturn nounwind
96declare void @llvm.trap() #0
97
98attributes #0 = { cold noreturn nounwind }
99
100;.
101; CHECK: attributes #[[ATTR0]] = { nounwind memory(inaccessiblemem: write) }
102; CHECK: attributes #[[ATTR1:[0-9]+]] = { cold noreturn nounwind memory(inaccessiblemem: write) }
103; CHECK: attributes #[[ATTR2]] = { nounwind memory(write) }
104; CHECK: attributes #[[ATTR3]] = { noreturn memory(write) }
105;.
106;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
107; CGSCC: {{.*}}
108; TUNIT: {{.*}}
109