1// RUN: not llvm-tblgen -gen-emitter -I %p/../../include %s 2>&1 | FileCheck %s --implicit-check-not=error: 2 3// Check that we emit reasonable diagnostics when fields do not have 4// corresponding operands. 5 6include "llvm/Target/Target.td" 7 8def ArchInstrInfo : InstrInfo { } 9 10def Arch : Target { 11 let InstructionSet = ArchInstrInfo; 12} 13 14def Reg : Register<"reg">; 15 16def Regs : RegisterClass<"foo", [i32], 0, (add Reg)>; 17 18// CHECK: error: No operand named rd in record foo 19// CHECK: error: No operand named rs in record foo 20// CHECK: note: Dumping record for previous error: 21def foo : Instruction { 22 bits<3> rd; 23 bits<3> rs; 24 25 bits<8> Inst; 26 let Inst{1-0} = 0; 27 let Inst{4-2} = rd; 28 let Inst{7-5} = rs; 29 30 let OutOperandList = (outs Regs:$xd); 31 let InOperandList = (ins); 32} 33