1// RUN: llvm-tblgen -I %S/Inputs -I %p/../../../include -gen-global-isel-combiner \ 2// RUN: -combiners=MyCombiner %s | \ 3// RUN: FileCheck %s 4 5include "llvm/Target/Target.td" 6include "llvm/Target/GlobalISel/Combine.td" 7 8include "test-intrinsics.td" 9 10def MyTargetISA : InstrInfo; 11def MyTarget : Target { let InstructionSet = MyTargetISA; } 12 13def IntrinTest0 : GICombineRule< 14 (defs root:$a), 15 (match (int_1in_1out $a, 0)), 16 (apply (int_1in_1out $a, $x), 17 (int_0in_1out i32:$x))>; 18 19def SpecialIntrins : GICombineRule< 20 (defs root:$a), 21 (match (int_sideeffects_1in_1out $a, $b)), 22 (apply (int_convergent_1in_1out i32:$x, $b), 23 (int_convergent_sideeffects_1in_1out $a, $x))>; 24 25def MyCombiner: GICombiner<"GenMyCombiner", [ 26 IntrinTest0, 27 SpecialIntrins 28]>; 29 30// CHECK: const uint8_t *GenMyCombiner::getMatchTable() const { 31// CHECK-NEXT: constexpr static uint8_t MatchTable0[] = { 32// CHECK-NEXT: GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2({{[0-9]+}}), GIMT_Encode2({{[0-9]+}}), /*)*//*default:*//*Label 2*/ GIMT_Encode4([[L132:[0-9]+]]), 33// CHECK-NEXT: /*TargetOpcode::G_INTRINSIC*//*Label 0*/ GIMT_Encode4(18), 34// CHECK-NEXT: /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 1*/ GIMT_Encode4([[L73:[0-9]+]]), 35// CHECK-NEXT: // Label 0: @18 36// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 3*/ GIMT_Encode4([[L72:[0-9]+]]), // Rule ID 0 // 37// CHECK-NEXT: GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule0Enabled), 38// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3, 39// CHECK-NEXT: GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::1in_1out), 40// CHECK-NEXT: // MIs[0] a 41// CHECK-NEXT: // No operand predicates 42// CHECK-NEXT: // MIs[0] Operand 2 43// CHECK-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 0, 44// CHECK-NEXT: GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, 45// CHECK-NEXT: // Combiner Rule #0: IntrinTest0 46// CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::G_INTRINSIC), 47// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), 48// CHECK-NEXT: GIR_AddIntrinsicID, /*MI*/0, GIMT_Encode2(Intrinsic::0in_1out), 49// CHECK-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::G_INTRINSIC), 50// CHECK-NEXT: GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/0, // a 51// CHECK-NEXT: GIR_AddIntrinsicID, /*MI*/1, GIMT_Encode2(Intrinsic::1in_1out), 52// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/0, 53// CHECK-NEXT: GIR_EraseRootFromParent_Done, 54// CHECK-NEXT: // Label 3: @[[L72]] 55// CHECK-NEXT: GIM_Reject, 56// CHECK-NEXT: // Label 1: @[[L73]] 57// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 4*/ GIMT_Encode4([[L131:[0-9]+]]), // Rule ID 1 // 58// CHECK-NEXT: GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule1Enabled), 59// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3, 60// CHECK-NEXT: GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::sideeffects_1in_1out), 61// CHECK-NEXT: // MIs[0] a 62// CHECK-NEXT: // No operand predicates 63// CHECK-NEXT: // MIs[0] b 64// CHECK-NEXT: // No operand predicates 65// CHECK-NEXT: GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32, 66// CHECK-NEXT: // Combiner Rule #1: SpecialIntrins 67// CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::G_INTRINSIC_CONVERGENT), 68// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define), 69// CHECK-NEXT: GIR_AddIntrinsicID, /*MI*/0, GIMT_Encode2(Intrinsic::convergent_1in_1out), 70// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/2, // b 71// CHECK-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS), 72// CHECK-NEXT: GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/0, // a 73// CHECK-NEXT: GIR_AddIntrinsicID, /*MI*/1, GIMT_Encode2(Intrinsic::convergent_sideeffects_1in_1out), 74// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/0, 75// CHECK-NEXT: GIR_MergeMemOperands, /*InsnID*/1, /*NumInsns*/1, /*MergeInsnID's*/0, 76// CHECK-NEXT: GIR_EraseRootFromParent_Done, 77// CHECK-NEXT: // Label 4: @[[L131]] 78// CHECK-NEXT: GIM_Reject, 79// CHECK-NEXT: // Label 2: @[[L132]] 80// CHECK-NEXT: GIM_Reject, 81// CHECK-NEXT: }; // Size: 125 bytes 82// CHECK-NEXT: return MatchTable0; 83// CHECK-NEXT: } 84