1// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s 2 3// Check that we don't generate invalid code of the form "( && Cond2)" when 4// emitting AssemblerPredicate conditions. In the example below, the invalid 5// code would be: "return ( && (Bits & arch::AssemblerCondition2));". 6 7include "llvm/Target/Target.td" 8 9def archInstrInfo : InstrInfo { } 10 11def arch : Target { 12 let InstructionSet = archInstrInfo; 13} 14 15def AssemblerCondition2 : SubtargetFeature<"cond2", "cond2", "true", "">; 16def Pred1 : Predicate<"Condition1">; 17def Pred2 : Predicate<"Condition2">, 18 AssemblerPredicate<(all_of AssemblerCondition2)>; 19 20def foo : Instruction { 21 let Size = 2; 22 let OutOperandList = (outs); 23 let InOperandList = (ins); 24 field bits<16> Inst; 25 let Inst = 0xAAAA; 26 let AsmString = "foo"; 27 field bits<16> SoftFail = 0; 28 // This is the important bit: 29 let Predicates = [Pred1, Pred2]; 30} 31 32// CHECK: return (Bits[arch::AssemblerCondition2]); 33