1# REQUIRES: aarch64-registered-target 2# RUN: not --crash llc -verify-machineinstrs -mtriple aarch64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s 3 4name: test 5body: | 6 bb.0: 7 liveins: $x0, $w0 8 %0:_(s64) = COPY $x0 9 %1:_(<4 x s16>) = COPY $x0 10 %2:_(s32) = COPY $w0 11 12 ; CHECK: *** Bad machine code: G_ASSERT_SEXT expects an immediate operand #2 *** 13 ; CHECK: instruction: %assert_sext_1:_(s64) = G_ASSERT_SEXT 14 %assert_sext_1:_(s64) = G_ASSERT_SEXT %0, %0 15 16 ; CHECK: *** Bad machine code: G_ASSERT_SEXT expects an immediate operand #2 *** 17 ; CHECK: instruction: %assert_sext_2:_(s64) = G_ASSERT_SEXT 18 %assert_sext_2:_(s64) = G_ASSERT_SEXT %0, i8 8 19 20 ; CHECK: *** Bad machine code: Type mismatch in generic instruction *** 21 ; CHECK: instruction: %assert_sext_3:_(<2 x s32>) = G_ASSERT_SEXT 22 %assert_sext_3:_(<2 x s32>) = G_ASSERT_SEXT %0, 8 23 24 ; CHECK: *** Bad machine code: Type mismatch in generic instruction *** 25 ; CHECK: instruction: %assert_sext_4:_(<2 x s32>) = G_ASSERT_SEXT 26 %assert_sext_4:_(<2 x s32>) = G_ASSERT_SEXT %1, 8 27 28 ; CHECK: *** Bad machine code: G_ASSERT_SEXT size must be >= 1 *** 29 ; CHECK: instruction: %assert_sext_5:_(s64) = G_ASSERT_SEXT 30 %assert_sext_5:_(s64) = G_ASSERT_SEXT %0, 0 31 32 ; CHECK: *** Bad machine code: G_ASSERT_SEXT size must be less than source bit width *** 33 ; CHECK: instruction: %assert_sext_6:_(s64) = G_ASSERT_SEXT 34 %assert_sext_6:_(s64) = G_ASSERT_SEXT %0, 128 35 36 ; CHECK: *** Bad machine code: Type mismatch in generic instruction *** 37 ; CHECK: instruction: %assert_sext_7:_(s64) = G_ASSERT_SEXT %2:_, 8 38 %assert_sext_7:_(s64) = G_ASSERT_SEXT %2, 8 39 40 ; CHECK: *** Bad machine code: Generic instruction cannot have physical register *** 41 ; CHECK: instruction: %assert_sext_8:_(s64) = G_ASSERT_SEXT $x0, 8 42 %assert_sext_8:_(s64) = G_ASSERT_SEXT $x0, 8 43