xref: /llvm-project/llvm/test/MachineVerifier/copy-scalable.mir (revision 4832c88e4956b3c7dc0a5064d946477448d5239d)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
2# RUN: llc -mtriple=riscv64 -o - -global-isel -run-pass=none -verify-machineinstrs %s | FileCheck %s
3# REQUIRES: riscv64-registered-target
4
5---
6name:            test_copy_physical_to_virtual_nxv1s8
7legalized:       true
8regBankSelected: false
9selected:        false
10tracksRegLiveness: true
11registers:
12  - { id: 0, class: _, preferred-register: '' }
13liveins:
14body:             |
15  bb.0:
16    liveins: $v8
17
18    ; CHECK-LABEL: name: test_copy_physical_to_virtual_nxv1s8
19    ; CHECK: liveins: $v8
20    ; CHECK-NEXT: {{  $}}
21    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v8
22    %0:_(<vscale x 1 x s8>) = COPY $v8
23...
24
25---
26name:            test_copy_physical_to_virtual_nxv16s8
27legalized:         true
28tracksRegLiveness: true
29body:             |
30  bb.1.entry:
31    liveins: $v8
32    ; CHECK-LABEL: name: test_copy_physical_to_virtual_nxv16s8
33    ; CHECK: liveins: $v8
34    ; CHECK-NEXT: {{  $}}
35    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v8
36    %0:_(<vscale x 16 x s8>) = COPY $v8
37
38...
39
40---
41name:            test_copy_virtual_to_physical
42legalized:       true
43regBankSelected: false
44selected:        false
45tracksRegLiveness: true
46registers:
47  - { id: 0, class: _, preferred-register: '' }
48liveins:
49body:             |
50  bb.0:
51    liveins: $v8
52
53    ; CHECK-LABEL: name: test_copy_virtual_to_physical
54    ; CHECK: liveins: $v8
55    ; CHECK-NEXT: {{  $}}
56    ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = IMPLICIT_DEF
57    ; CHECK-NEXT: $v8 = COPY [[DEF]](<vscale x 1 x s8>)
58    ; CHECK-NEXT: PseudoRET implicit $v8
59    %0:_(<vscale x 1 x s8>) = IMPLICIT_DEF
60    $v8 = COPY %0(<vscale x 1 x s8>)
61    PseudoRET implicit $v8
62...
63