xref: /llvm-project/llvm/test/MC/X86/sha512-64-intel.s (revision fc3b7874b6c95f04a249e2c9da3c5221f50c85b2) 
1// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
2
3// CHECK: vsha512msg1 ymm12, xmm3
4// CHECK: encoding: [0xc4,0x62,0x7f,0xcc,0xe3]
5          vsha512msg1 ymm12, xmm3
6
7// CHECK: vsha512msg2 ymm12, ymm3
8// CHECK: encoding: [0xc4,0x62,0x7f,0xcd,0xe3]
9          vsha512msg2 ymm12, ymm3
10
11// CHECK: vsha512rnds2 ymm12, ymm3, xmm4
12// CHECK: encoding: [0xc4,0x62,0x67,0xcb,0xe4]
13          vsha512rnds2 ymm12, ymm3, xmm4
14
15