xref: /llvm-project/llvm/test/MC/X86/sha512-32-intel.s (revision fc3b7874b6c95f04a249e2c9da3c5221f50c85b2) 
1// RUN: llvm-mc -triple i686 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
2
3// CHECK:      vsha512msg1 ymm2, xmm3
4// CHECK: encoding: [0xc4,0xe2,0x7f,0xcc,0xd3]
5               vsha512msg1 ymm2, xmm3
6
7// CHECK:      vsha512msg2 ymm2, ymm3
8// CHECK: encoding: [0xc4,0xe2,0x7f,0xcd,0xd3]
9               vsha512msg2 ymm2, ymm3
10
11// CHECK:      vsha512rnds2 ymm2, ymm3, xmm4
12// CHECK: encoding: [0xc4,0xe2,0x67,0xcb,0xd4]
13               vsha512rnds2 ymm2, ymm3, xmm4
14