1# For zEC12 only. 2# RUN: not llvm-mc -triple s390x-linux-gnu -mcpu=zEC12 < %s 2> %t 3# RUN: FileCheck < %t %s 4# RUN: not llvm-mc -triple s390x-linux-gnu -mcpu=arch10 < %s 2> %t 5# RUN: FileCheck < %t %s 6 7#CHECK: error: invalid operand 8#CHECK: bpp -1, 0, 0 9#CHECK: error: invalid operand 10#CHECK: bpp 16, 0, 0 11#CHECK: error: offset out of range 12#CHECK: bpp 0, -0x10002, 0 13#CHECK: error: offset out of range 14#CHECK: bpp 0, -1, 0 15#CHECK: error: offset out of range 16#CHECK: bpp 0, 1, 0 17#CHECK: error: offset out of range 18#CHECK: bpp 0, 0x10000, 0 19#CHECK: error: invalid operand 20#CHECK: bpp 0, 0, -1 21#CHECK: error: invalid operand 22#CHECK: bpp 0, 0, 4096 23 24 bpp -1, 0, 0 25 bpp 16, 0, 0 26 bpp 0, -0x10002, 0 27 bpp 0, -1, 0 28 bpp 0, 1, 0 29 bpp 0, 0x10000, 0 30 bpp 0, 0, -1 31 bpp 0, 0, 4096 32 33#CHECK: error: invalid operand 34#CHECK: bprp -1, 0, 0 35#CHECK: error: invalid operand 36#CHECK: bprp 16, 0, 0 37#CHECK: error: offset out of range 38#CHECK: bprp 0, -0x1002, 0 39#CHECK: error: offset out of range 40#CHECK: bprp 0, -1, 0 41#CHECK: error: offset out of range 42#CHECK: bprp 0, 1, 0 43#CHECK: error: offset out of range 44#CHECK: bprp 0, 0x1000, 0 45#CHECK: error: offset out of range 46#CHECK: bprp 0, 0, -0x1000002 47#CHECK: error: offset out of range 48#CHECK: bprp 0, 0, -1 49#CHECK: error: offset out of range 50#CHECK: bprp 0, 0, 1 51#CHECK: error: offset out of range 52#CHECK: bprp 0, 0, 0x1000000 53 54 bprp -1, 0, 0 55 bprp 16, 0, 0 56 bprp 0, -0x1002, 0 57 bprp 0, -1, 0 58 bprp 0, 1, 0 59 bprp 0, 0x1000, 0 60 bprp 0, 0, -0x1000002 61 bprp 0, 0, -1 62 bprp 0, 0, 1 63 bprp 0, 0, 0x1000000 64 65#CHECK: error: instruction requires: dfp-packed-conversion 66#CHECK: cdpt %f0, 0(1), 0 67 68 cdpt %f0, 0(1), 0 69 70#CHECK: error: invalid operand 71#CHECK: cdzt %f0, 0(1), -1 72#CHECK: error: invalid operand 73#CHECK: cdzt %f0, 0(1), 16 74#CHECK: error: missing length in address 75#CHECK: cdzt %f0, 0, 0 76#CHECK: error: missing length in address 77#CHECK: cdzt %f0, 0(%r1), 0 78#CHECK: error: invalid operand 79#CHECK: cdzt %f0, 0(0,%r1), 0 80#CHECK: error: invalid operand 81#CHECK: cdzt %f0, 0(257,%r1), 0 82#CHECK: error: invalid operand 83#CHECK: cdzt %f0, -1(1,%r1), 0 84#CHECK: error: invalid operand 85#CHECK: cdzt %f0, 4096(1,%r1), 0 86#CHECK: error: invalid use of indexed addressing 87#CHECK: cdzt %f0, 0(%r1,%r2), 0 88#CHECK: error: unknown token in expression 89#CHECK: cdzt %f0, 0(-), 0 90 91 cdzt %f0, 0(1), -1 92 cdzt %f0, 0(1), 16 93 cdzt %f0, 0, 0 94 cdzt %f0, 0(%r1), 0 95 cdzt %f0, 0(0,%r1), 0 96 cdzt %f0, 0(257,%r1), 0 97 cdzt %f0, -1(1,%r1), 0 98 cdzt %f0, 4096(1,%r1), 0 99 cdzt %f0, 0(%r1,%r2), 0 100 cdzt %f0, 0(-), 0 101 102#CHECK: error: invalid operand 103#CHECK: clgt %r0, -1, 0 104#CHECK: error: invalid operand 105#CHECK: clgt %r0, 16, 0 106#CHECK: error: invalid operand 107#CHECK: clgt %r0, 12, -524289 108#CHECK: error: invalid operand 109#CHECK: clgt %r0, 12, 524288 110#CHECK: error: invalid use of indexed addressing 111#CHECK: clgt %r0, 12, 0(%r1,%r2) 112 113 clgt %r0, -1, 0 114 clgt %r0, 16, 0 115 clgt %r0, 12, -524289 116 clgt %r0, 12, 524288 117 clgt %r0, 12, 0(%r1,%r2) 118 119#CHECK: error: invalid instruction 120#CHECK: clgtno %r0, 0 121#CHECK: error: invalid instruction 122#CHECK: clgto %r0, 0 123 124 clgtno %r0, 0 125 clgto %r0, 0 126 127#CHECK: error: invalid operand 128#CHECK: clt %r0, -1, 0 129#CHECK: error: invalid operand 130#CHECK: clt %r0, 16, 0 131#CHECK: error: invalid operand 132#CHECK: clt %r0, 12, -524289 133#CHECK: error: invalid operand 134#CHECK: clt %r0, 12, 524288 135#CHECK: error: invalid use of indexed addressing 136#CHECK: clt %r0, 12, 0(%r1,%r2) 137 138 clt %r0, -1, 0 139 clt %r0, 16, 0 140 clt %r0, 12, -524289 141 clt %r0, 12, 524288 142 clt %r0, 12, 0(%r1,%r2) 143 144#CHECK: error: invalid instruction 145#CHECK: cltno %r0, 0 146#CHECK: error: invalid instruction 147#CHECK: clto %r0, 0 148 149 cltno %r0, 0 150 clto %r0, 0 151 152#CHECK: error: instruction requires: dfp-packed-conversion 153#CHECK: cpdt %f0, 0(1), 0 154 155 cpdt %f0, 0(1), 0 156 157#CHECK: error: instruction requires: dfp-packed-conversion 158#CHECK: cpxt %f0, 0(1), 0 159 160 cpxt %f0, 0(1), 0 161 162#CHECK: error: invalid register pair 163#CHECK: crdte %r1, %r0, %r0, 0 164#CHECK: error: invalid register pair 165#CHECK: crdte %r0, %r0, %r1, 0 166#CHECK: error: invalid operand 167#CHECK: crdte %r0, %r0, %r0, -1 168#CHECK: error: invalid operand 169#CHECK: crdte %r0, %r0, %r0, 16 170 171 crdte %r1, %r0, %r0, 0 172 crdte %r0, %r0, %r1, 0 173 crdte %r0, %r0, %r0, -1 174 crdte %r0, %r0, %r0, 16 175 176#CHECK: error: instruction requires: dfp-packed-conversion 177#CHECK: cxpt %f0, 0(1), 0 178 179 cxpt %f0, 0(1), 0 180 181#CHECK: error: invalid operand 182#CHECK: cxzt %f0, 0(1), -1 183#CHECK: error: invalid operand 184#CHECK: cxzt %f0, 0(1), 16 185#CHECK: error: missing length in address 186#CHECK: cxzt %f0, 0, 0 187#CHECK: error: missing length in address 188#CHECK: cxzt %f0, 0(%r1), 0 189#CHECK: error: invalid operand 190#CHECK: cxzt %f0, 0(0,%r1), 0 191#CHECK: error: invalid operand 192#CHECK: cxzt %f0, 0(257,%r1), 0 193#CHECK: error: invalid operand 194#CHECK: cxzt %f0, -1(1,%r1), 0 195#CHECK: error: invalid operand 196#CHECK: cxzt %f0, 4096(1,%r1), 0 197#CHECK: error: invalid use of indexed addressing 198#CHECK: cxzt %f0, 0(%r1,%r2), 0 199#CHECK: error: unknown token in expression 200#CHECK: cxzt %f0, 0(-), 0 201#CHECK: error: invalid register pair 202#CHECK: cxzt %f15, 0(1), 0 203 204 cxzt %f0, 0(1), -1 205 cxzt %f0, 0(1), 16 206 cxzt %f0, 0, 0 207 cxzt %f0, 0(%r1), 0 208 cxzt %f0, 0(0,%r1), 0 209 cxzt %f0, 0(257,%r1), 0 210 cxzt %f0, -1(1,%r1), 0 211 cxzt %f0, 4096(1,%r1), 0 212 cxzt %f0, 0(%r1,%r2), 0 213 cxzt %f0, 0(-), 0 214 cxzt %f15, 0(1), 0 215 216#CHECK: error: invalid operand 217#CHECK: czdt %f0, 0(1), -1 218#CHECK: error: invalid operand 219#CHECK: czdt %f0, 0(1), 16 220#CHECK: error: missing length in address 221#CHECK: czdt %f0, 0, 0 222#CHECK: error: missing length in address 223#CHECK: czdt %f0, 0(%r1), 0 224#CHECK: error: invalid operand 225#CHECK: czdt %f0, 0(0,%r1), 0 226#CHECK: error: invalid operand 227#CHECK: czdt %f0, 0(257,%r1), 0 228#CHECK: error: invalid operand 229#CHECK: czdt %f0, -1(1,%r1), 0 230#CHECK: error: invalid operand 231#CHECK: czdt %f0, 4096(1,%r1), 0 232#CHECK: error: invalid use of indexed addressing 233#CHECK: czdt %f0, 0(%r1,%r2), 0 234#CHECK: error: unknown token in expression 235#CHECK: czdt %f0, 0(-), 0 236 237 czdt %f0, 0(1), -1 238 czdt %f0, 0(1), 16 239 czdt %f0, 0, 0 240 czdt %f0, 0(%r1), 0 241 czdt %f0, 0(0,%r1), 0 242 czdt %f0, 0(257,%r1), 0 243 czdt %f0, -1(1,%r1), 0 244 czdt %f0, 4096(1,%r1), 0 245 czdt %f0, 0(%r1,%r2), 0 246 czdt %f0, 0(-), 0 247 248#CHECK: error: invalid operand 249#CHECK: czxt %f0, 0(1), -1 250#CHECK: error: invalid operand 251#CHECK: czxt %f0, 0(1), 16 252#CHECK: error: missing length in address 253#CHECK: czxt %f0, 0, 0 254#CHECK: error: missing length in address 255#CHECK: czxt %f0, 0(%r1), 0 256#CHECK: error: invalid operand 257#CHECK: czxt %f0, 0(0,%r1), 0 258#CHECK: error: invalid operand 259#CHECK: czxt %f0, 0(257,%r1), 0 260#CHECK: error: invalid operand 261#CHECK: czxt %f0, -1(1,%r1), 0 262#CHECK: error: invalid operand 263#CHECK: czxt %f0, 4096(1,%r1), 0 264#CHECK: error: invalid use of indexed addressing 265#CHECK: czxt %f0, 0(%r1,%r2), 0 266#CHECK: error: unknown token in expression 267#CHECK: czxt %f0, 0(-), 0 268#CHECK: error: invalid register pair 269#CHECK: czxt %f15, 0(1), 0 270 271 czxt %f0, 0(1), -1 272 czxt %f0, 0(1), 16 273 czxt %f0, 0, 0 274 czxt %f0, 0(%r1), 0 275 czxt %f0, 0(0,%r1), 0 276 czxt %f0, 0(257,%r1), 0 277 czxt %f0, -1(1,%r1), 0 278 czxt %f0, 4096(1,%r1), 0 279 czxt %f0, 0(%r1,%r2), 0 280 czxt %f0, 0(-), 0 281 czxt %f15, 0(1), 0 282 283#CHECK: error: invalid operand 284#CHECK: lat %r0, -524289 285#CHECK: error: invalid operand 286#CHECK: lat %r0, 524288 287 288 lat %r0, -524289 289 lat %r0, 524288 290 291#CHECK: error: instruction requires: vector 292#CHECK: lcbb %r0, 0, 0 293 294 lcbb %r0, 0, 0 295 296#CHECK: error: invalid operand 297#CHECK: lfhat %r0, -524289 298#CHECK: error: invalid operand 299#CHECK: lfhat %r0, 524288 300 301 lfhat %r0, -524289 302 lfhat %r0, 524288 303 304#CHECK: error: invalid operand 305#CHECK: lgat %r0, -524289 306#CHECK: error: invalid operand 307#CHECK: lgat %r0, 524288 308 309 lgat %r0, -524289 310 lgat %r0, 524288 311 312#CHECK: error: invalid operand 313#CHECK: llgfat %r0, -524289 314#CHECK: error: invalid operand 315#CHECK: llgfat %r0, 524288 316 317 llgfat %r0, -524289 318 llgfat %r0, 524288 319 320#CHECK: error: invalid operand 321#CHECK: llgtat %r0, -524289 322#CHECK: error: invalid operand 323#CHECK: llgtat %r0, 524288 324 325 llgtat %r0, -524289 326 llgtat %r0, 524288 327 328#CHECK: error: instruction requires: load-store-on-cond-2 329#CHECK: locghio %r11, 42 330 331 locghio %r11, 42 332 333#CHECK: error: instruction requires: load-store-on-cond-2 334#CHECK: lochio %r11, 42 335 336 lochio %r11, 42 337 338#CHECK: error: invalid operand 339#CHECK: niai -1, 0 340#CHECK: error: invalid operand 341#CHECK: niai 16, 0 342#CHECK: error: invalid operand 343#CHECK: niai 0, -1 344#CHECK: error: invalid operand 345#CHECK: niai 0, 16 346 347 niai -1, 0 348 niai 16, 0 349 niai 0, -1 350 niai 0, 16 351 352#CHECK: error: invalid operand 353#CHECK: ntstg %r0, -524289 354#CHECK: error: invalid operand 355#CHECK: ntstg %r0, 524288 356 357 ntstg %r0, -524289 358 ntstg %r0, 524288 359 360#CHECK: error: invalid operand 361#CHECK: ppa %r0, %r0, -1 362#CHECK: error: invalid operand 363#CHECK: ppa %r0, %r0, 16 364 365 ppa %r0, %r0, -1 366 ppa %r0, %r0, 16 367 368#CHECK: error: instruction requires: message-security-assist-extension5 369#CHECK: ppno %r2, %r4 370 371 ppno %r2, %r4 372 373#CHECK: error: invalid operand 374#CHECK: risbgn %r0,%r0,0,-1,0 375#CHECK: error: invalid operand 376#CHECK: risbgn %r0,%r0,0,256,0 377#CHECK: error: invalid operand 378#CHECK: risbgn %r0,%r0,-1,0,0 379#CHECK: error: invalid operand 380#CHECK: risbgn %r0,%r0,256,0,0 381 382 risbgn %r0,%r0,0,-1,0 383 risbgn %r0,%r0,0,256,0 384 risbgn %r0,%r0,-1,0,0 385 risbgn %r0,%r0,256,0,0 386 387#CHECK: error: invalid operand 388#CHECK: tabort -1 389#CHECK: error: invalid operand 390#CHECK: tabort 4096 391#CHECK: error: invalid use of indexed addressing 392#CHECK: tabort 0(%r1,%r2) 393 394 tabort -1 395 tabort 4096 396 tabort 0(%r1,%r2) 397 398#CHECK: error: invalid operand 399#CHECK: tbegin -1, 0 400#CHECK: error: invalid operand 401#CHECK: tbegin 4096, 0 402#CHECK: error: invalid use of indexed addressing 403#CHECK: tbegin 0(%r1,%r2), 0 404#CHECK: error: invalid operand 405#CHECK: tbegin 0, -1 406#CHECK: error: invalid operand 407#CHECK: tbegin 0, 65536 408 409 tbegin -1, 0 410 tbegin 4096, 0 411 tbegin 0(%r1,%r2), 0 412 tbegin 0, -1 413 tbegin 0, 65536 414 415#CHECK: error: invalid operand 416#CHECK: tbeginc -1, 0 417#CHECK: error: invalid operand 418#CHECK: tbeginc 4096, 0 419#CHECK: error: invalid use of indexed addressing 420#CHECK: tbeginc 0(%r1,%r2), 0 421#CHECK: error: invalid operand 422#CHECK: tbeginc 0, -1 423#CHECK: error: invalid operand 424#CHECK: tbeginc 0, 65536 425 426 tbeginc -1, 0 427 tbeginc 4096, 0 428 tbeginc 0(%r1,%r2), 0 429 tbeginc 0, -1 430 tbeginc 0, 65536 431 432#CHECK: error: instruction requires: vector 433#CHECK: vab %v0, %v0, %v0 434#CHECK: error: instruction requires: vector 435#CHECK: vaf %v0, %v0, %v0 436#CHECK: error: instruction requires: vector 437#CHECK: vag %v0, %v0, %v0 438#CHECK: error: instruction requires: vector 439#CHECK: vah %v0, %v0, %v0 440#CHECK: error: instruction requires: vector 441#CHECK: vaq %v0, %v0, %v0 442 443 vab %v0, %v0, %v0 444 vaf %v0, %v0, %v0 445 vag %v0, %v0, %v0 446 vah %v0, %v0, %v0 447 vaq %v0, %v0, %v0 448 449#CHECK: error: instruction requires: vector 450#CHECK: vaccb %v0, %v0, %v0 451#CHECK: error: instruction requires: vector 452#CHECK: vaccf %v0, %v0, %v0 453#CHECK: error: instruction requires: vector 454#CHECK: vaccg %v0, %v0, %v0 455#CHECK: error: instruction requires: vector 456#CHECK: vacch %v0, %v0, %v0 457#CHECK: error: instruction requires: vector 458#CHECK: vaccq %v0, %v0, %v0 459 460 vaccb %v0, %v0, %v0 461 vaccf %v0, %v0, %v0 462 vaccg %v0, %v0, %v0 463 vacch %v0, %v0, %v0 464 vaccq %v0, %v0, %v0 465 466#CHECK: error: instruction requires: vector 467#CHECK: vacccq %v0, %v0, %v0, %v0 468 469 vacccq %v0, %v0, %v0, %v0 470 471#CHECK: error: instruction requires: vector 472#CHECK: vacq %v0, %v0, %v0, %v0 473 474 vacq %v0, %v0, %v0, %v0 475 476#CHECK: error: instruction requires: vector 477#CHECK: vavgb %v0, %v0, %v0 478#CHECK: error: instruction requires: vector 479#CHECK: vavgf %v0, %v0, %v0 480#CHECK: error: instruction requires: vector 481#CHECK: vavgg %v0, %v0, %v0 482#CHECK: error: instruction requires: vector 483#CHECK: vavgh %v0, %v0, %v0 484 485 vavgb %v0, %v0, %v0 486 vavgf %v0, %v0, %v0 487 vavgg %v0, %v0, %v0 488 vavgh %v0, %v0, %v0 489 490#CHECK: error: instruction requires: vector 491#CHECK: vavglb %v0, %v0, %v0 492#CHECK: error: instruction requires: vector 493#CHECK: vavglf %v0, %v0, %v0 494#CHECK: error: instruction requires: vector 495#CHECK: vavglg %v0, %v0, %v0 496#CHECK: error: instruction requires: vector 497#CHECK: vavglh %v0, %v0, %v0 498 499 vavglb %v0, %v0, %v0 500 vavglf %v0, %v0, %v0 501 vavglg %v0, %v0, %v0 502 vavglh %v0, %v0, %v0 503 504#CHECK: error: instruction requires: vector 505#CHECK: vcdgb %v0, %v0, 0, 0 506 507 vcdgb %v0, %v0, 0, 0 508 509#CHECK: error: instruction requires: vector 510#CHECK: vcdlgb %v0, %v0, 0, 0 511 512 vcdlgb %v0, %v0, 0, 0 513 514#CHECK: error: instruction requires: vector 515#CHECK: vceqb %v0, %v0, %v0 516#CHECK: error: instruction requires: vector 517#CHECK: vceqbs %v0, %v0, %v0 518#CHECK: error: instruction requires: vector 519#CHECK: vceqf %v0, %v0, %v0 520#CHECK: error: instruction requires: vector 521#CHECK: vceqfs %v0, %v0, %v0 522#CHECK: error: instruction requires: vector 523#CHECK: vceqg %v0, %v0, %v0 524#CHECK: error: instruction requires: vector 525#CHECK: vceqgs %v0, %v0, %v0 526#CHECK: error: instruction requires: vector 527#CHECK: vceqh %v0, %v0, %v0 528#CHECK: error: instruction requires: vector 529#CHECK: vceqhs %v0, %v0, %v0 530 531 vceqb %v0, %v0, %v0 532 vceqbs %v0, %v0, %v0 533 vceqf %v0, %v0, %v0 534 vceqfs %v0, %v0, %v0 535 vceqg %v0, %v0, %v0 536 vceqgs %v0, %v0, %v0 537 vceqh %v0, %v0, %v0 538 vceqhs %v0, %v0, %v0 539 540#CHECK: error: instruction requires: vector 541#CHECK: vcgdb %v0, %v0, 0, 0 542 543 vcgdb %v0, %v0, 0, 0 544 545#CHECK: error: instruction requires: vector 546#CHECK: vchb %v0, %v0, %v0 547#CHECK: error: instruction requires: vector 548#CHECK: vchbs %v0, %v0, %v0 549#CHECK: error: instruction requires: vector 550#CHECK: vchf %v0, %v0, %v0 551#CHECK: error: instruction requires: vector 552#CHECK: vchfs %v0, %v0, %v0 553#CHECK: error: instruction requires: vector 554#CHECK: vchg %v0, %v0, %v0 555#CHECK: error: instruction requires: vector 556#CHECK: vchgs %v0, %v0, %v0 557#CHECK: error: instruction requires: vector 558#CHECK: vchh %v0, %v0, %v0 559#CHECK: error: instruction requires: vector 560#CHECK: vchhs %v0, %v0, %v0 561 562 vchb %v0, %v0, %v0 563 vchbs %v0, %v0, %v0 564 vchf %v0, %v0, %v0 565 vchfs %v0, %v0, %v0 566 vchg %v0, %v0, %v0 567 vchgs %v0, %v0, %v0 568 vchh %v0, %v0, %v0 569 vchhs %v0, %v0, %v0 570 571#CHECK: error: instruction requires: vector 572#CHECK: vchlb %v0, %v0, %v0 573#CHECK: error: instruction requires: vector 574#CHECK: vchlbs %v0, %v0, %v0 575#CHECK: error: instruction requires: vector 576#CHECK: vchlf %v0, %v0, %v0 577#CHECK: error: instruction requires: vector 578#CHECK: vchlfs %v0, %v0, %v0 579#CHECK: error: instruction requires: vector 580#CHECK: vchlg %v0, %v0, %v0 581#CHECK: error: instruction requires: vector 582#CHECK: vchlgs %v0, %v0, %v0 583#CHECK: error: instruction requires: vector 584#CHECK: vchlh %v0, %v0, %v0 585#CHECK: error: instruction requires: vector 586#CHECK: vchlhs %v0, %v0, %v0 587 588 vchlb %v0, %v0, %v0 589 vchlbs %v0, %v0, %v0 590 vchlf %v0, %v0, %v0 591 vchlfs %v0, %v0, %v0 592 vchlg %v0, %v0, %v0 593 vchlgs %v0, %v0, %v0 594 vchlh %v0, %v0, %v0 595 vchlhs %v0, %v0, %v0 596 597#CHECK: error: instruction requires: vector 598#CHECK: vcksm %v0, %v0, %v0 599 600 vcksm %v0, %v0, %v0 601 602#CHECK: error: instruction requires: vector 603#CHECK: vclgdb %v0, %v0, 0, 0 604 605 vclgdb %v0, %v0, 0, 0 606 607#CHECK: error: instruction requires: vector 608#CHECK: vclzb %v0, %v0 609#CHECK: error: instruction requires: vector 610#CHECK: vclzf %v0, %v0 611#CHECK: error: instruction requires: vector 612#CHECK: vclzg %v0, %v0 613#CHECK: error: instruction requires: vector 614#CHECK: vclzh %v0, %v0 615 616 vclzb %v0, %v0 617 vclzf %v0, %v0 618 vclzg %v0, %v0 619 vclzh %v0, %v0 620 621#CHECK: error: instruction requires: vector 622#CHECK: vctzb %v0, %v0 623#CHECK: error: instruction requires: vector 624#CHECK: vctzf %v0, %v0 625#CHECK: error: instruction requires: vector 626#CHECK: vctzg %v0, %v0 627#CHECK: error: instruction requires: vector 628#CHECK: vctzh %v0, %v0 629 630 vctzb %v0, %v0 631 vctzf %v0, %v0 632 vctzg %v0, %v0 633 vctzh %v0, %v0 634 635#CHECK: error: instruction requires: vector 636#CHECK: vecb %v0, %v0 637#CHECK: error: instruction requires: vector 638#CHECK: vecf %v0, %v0 639#CHECK: error: instruction requires: vector 640#CHECK: vecg %v0, %v0 641#CHECK: error: instruction requires: vector 642#CHECK: vech %v0, %v0 643 644 vecb %v0, %v0 645 vecf %v0, %v0 646 vecg %v0, %v0 647 vech %v0, %v0 648 649#CHECK: error: instruction requires: vector 650#CHECK: veclb %v0, %v0 651#CHECK: error: instruction requires: vector 652#CHECK: veclf %v0, %v0 653#CHECK: error: instruction requires: vector 654#CHECK: veclg %v0, %v0 655#CHECK: error: instruction requires: vector 656#CHECK: veclh %v0, %v0 657 658 veclb %v0, %v0 659 veclf %v0, %v0 660 veclg %v0, %v0 661 veclh %v0, %v0 662 663#CHECK: error: instruction requires: vector 664#CHECK: verimb %v0, %v0, %v0, 0 665#CHECK: error: instruction requires: vector 666#CHECK: verimf %v0, %v0, %v0, 0 667#CHECK: error: instruction requires: vector 668#CHECK: verimg %v0, %v0, %v0, 0 669#CHECK: error: instruction requires: vector 670#CHECK: verimh %v0, %v0, %v0, 0 671 672 verimb %v0, %v0, %v0, 0 673 verimf %v0, %v0, %v0, 0 674 verimg %v0, %v0, %v0, 0 675 verimh %v0, %v0, %v0, 0 676 677#CHECK: error: instruction requires: vector 678#CHECK: verllb %v0, %v0, 0 679#CHECK: error: instruction requires: vector 680#CHECK: verllf %v0, %v0, 0 681#CHECK: error: instruction requires: vector 682#CHECK: verllg %v0, %v0, 0 683#CHECK: error: instruction requires: vector 684#CHECK: verllh %v0, %v0, 0 685 686 verllb %v0, %v0, 0 687 verllf %v0, %v0, 0 688 verllg %v0, %v0, 0 689 verllh %v0, %v0, 0 690 691#CHECK: error: instruction requires: vector 692#CHECK: verllvb %v0, %v0, %v0 693#CHECK: error: instruction requires: vector 694#CHECK: verllvf %v0, %v0, %v0 695#CHECK: error: instruction requires: vector 696#CHECK: verllvg %v0, %v0, %v0 697#CHECK: error: instruction requires: vector 698#CHECK: verllvh %v0, %v0, %v0 699 700 verllvb %v0, %v0, %v0 701 verllvf %v0, %v0, %v0 702 verllvg %v0, %v0, %v0 703 verllvh %v0, %v0, %v0 704 705#CHECK: error: instruction requires: vector 706#CHECK: veslb %v0, %v0, 0 707#CHECK: error: instruction requires: vector 708#CHECK: veslf %v0, %v0, 0 709#CHECK: error: instruction requires: vector 710#CHECK: veslg %v0, %v0, 0 711#CHECK: error: instruction requires: vector 712#CHECK: veslh %v0, %v0, 0 713 714 veslb %v0, %v0, 0 715 veslf %v0, %v0, 0 716 veslg %v0, %v0, 0 717 veslh %v0, %v0, 0 718 719#CHECK: error: instruction requires: vector 720#CHECK: veslvb %v0, %v0, %v0 721#CHECK: error: instruction requires: vector 722#CHECK: veslvf %v0, %v0, %v0 723#CHECK: error: instruction requires: vector 724#CHECK: veslvg %v0, %v0, %v0 725#CHECK: error: instruction requires: vector 726#CHECK: veslvh %v0, %v0, %v0 727 728 veslvb %v0, %v0, %v0 729 veslvf %v0, %v0, %v0 730 veslvg %v0, %v0, %v0 731 veslvh %v0, %v0, %v0 732 733#CHECK: error: instruction requires: vector 734#CHECK: vesrab %v0, %v0, 0 735#CHECK: error: instruction requires: vector 736#CHECK: vesraf %v0, %v0, 0 737#CHECK: error: instruction requires: vector 738#CHECK: vesrag %v0, %v0, 0 739#CHECK: error: instruction requires: vector 740#CHECK: vesrah %v0, %v0, 0 741 742 vesrab %v0, %v0, 0 743 vesraf %v0, %v0, 0 744 vesrag %v0, %v0, 0 745 vesrah %v0, %v0, 0 746 747#CHECK: error: instruction requires: vector 748#CHECK: vesravb %v0, %v0, %v0 749#CHECK: error: instruction requires: vector 750#CHECK: vesravf %v0, %v0, %v0 751#CHECK: error: instruction requires: vector 752#CHECK: vesravg %v0, %v0, %v0 753#CHECK: error: instruction requires: vector 754#CHECK: vesravh %v0, %v0, %v0 755 756 vesravb %v0, %v0, %v0 757 vesravf %v0, %v0, %v0 758 vesravg %v0, %v0, %v0 759 vesravh %v0, %v0, %v0 760 761#CHECK: error: instruction requires: vector 762#CHECK: vesrlb %v0, %v0, 0 763#CHECK: error: instruction requires: vector 764#CHECK: vesrlf %v0, %v0, 0 765#CHECK: error: instruction requires: vector 766#CHECK: vesrlg %v0, %v0, 0 767#CHECK: error: instruction requires: vector 768#CHECK: vesrlh %v0, %v0, 0 769 770 vesrlb %v0, %v0, 0 771 vesrlf %v0, %v0, 0 772 vesrlg %v0, %v0, 0 773 vesrlh %v0, %v0, 0 774 775#CHECK: error: instruction requires: vector 776#CHECK: vesrlvb %v0, %v0, %v0 777#CHECK: error: instruction requires: vector 778#CHECK: vesrlvf %v0, %v0, %v0 779#CHECK: error: instruction requires: vector 780#CHECK: vesrlvg %v0, %v0, %v0 781#CHECK: error: instruction requires: vector 782#CHECK: vesrlvh %v0, %v0, %v0 783 784 vesrlvb %v0, %v0, %v0 785 vesrlvf %v0, %v0, %v0 786 vesrlvg %v0, %v0, %v0 787 vesrlvh %v0, %v0, %v0 788 789#CHECK: error: instruction requires: vector 790#CHECK: vfadb %v0, %v0, %v0 791 792 vfadb %v0, %v0, %v0 793 794#CHECK: error: instruction requires: vector 795#CHECK: vfaeb %v0, %v0, %v0 796#CHECK: error: instruction requires: vector 797#CHECK: vfaebs %v0, %v0, %v0 798#CHECK: error: instruction requires: vector 799#CHECK: vfaef %v0, %v0, %v0 800#CHECK: error: instruction requires: vector 801#CHECK: vfaefs %v0, %v0, %v0 802#CHECK: error: instruction requires: vector 803#CHECK: vfaeh %v0, %v0, %v0 804#CHECK: error: instruction requires: vector 805#CHECK: vfaehs %v0, %v0, %v0 806#CHECK: error: instruction requires: vector 807#CHECK: vfaezb %v0, %v0, %v0 808#CHECK: error: instruction requires: vector 809#CHECK: vfaezbs %v0, %v0, %v0 810#CHECK: error: instruction requires: vector 811#CHECK: vfaezf %v0, %v0, %v0 812#CHECK: error: instruction requires: vector 813#CHECK: vfaezfs %v0, %v0, %v0 814#CHECK: error: instruction requires: vector 815#CHECK: vfaezh %v0, %v0, %v0 816#CHECK: error: instruction requires: vector 817#CHECK: vfaezhs %v0, %v0, %v0 818 819 vfaeb %v0, %v0, %v0 820 vfaebs %v0, %v0, %v0 821 vfaef %v0, %v0, %v0 822 vfaefs %v0, %v0, %v0 823 vfaeh %v0, %v0, %v0 824 vfaehs %v0, %v0, %v0 825 vfaezb %v0, %v0, %v0 826 vfaezbs %v0, %v0, %v0 827 vfaezf %v0, %v0, %v0 828 vfaezfs %v0, %v0, %v0 829 vfaezh %v0, %v0, %v0 830 vfaezhs %v0, %v0, %v0 831 832#CHECK: error: instruction requires: vector 833#CHECK: vfcedb %v0, %v0, %v0 834#CHECK: vfcedbs %v0, %v0, %v0 835 836 vfcedb %v0, %v0, %v0 837 vfcedbs %v0, %v0, %v0 838 839#CHECK: error: instruction requires: vector 840#CHECK: vfchdb %v0, %v0, %v0 841#CHECK: vfchdbs %v0, %v0, %v0 842 843 vfchdb %v0, %v0, %v0 844 vfchdbs %v0, %v0, %v0 845 846#CHECK: error: instruction requires: vector 847#CHECK: vfddb %v0, %v0, %v0 848 849 vfddb %v0, %v0, %v0 850 851#CHECK: error: instruction requires: vector 852#CHECK: vfeeb %v0, %v0, %v0 853#CHECK: error: instruction requires: vector 854#CHECK: vfeebs %v0, %v0, %v0 855#CHECK: error: instruction requires: vector 856#CHECK: vfeef %v0, %v0, %v0 857#CHECK: error: instruction requires: vector 858#CHECK: vfeefs %v0, %v0, %v0 859#CHECK: error: instruction requires: vector 860#CHECK: vfeeh %v0, %v0, %v0 861#CHECK: error: instruction requires: vector 862#CHECK: vfeehs %v0, %v0, %v0 863#CHECK: error: instruction requires: vector 864#CHECK: vfeezb %v0, %v0, %v0 865#CHECK: error: instruction requires: vector 866#CHECK: vfeezbs %v0, %v0, %v0 867#CHECK: error: instruction requires: vector 868#CHECK: vfeezf %v0, %v0, %v0 869#CHECK: error: instruction requires: vector 870#CHECK: vfeezfs %v0, %v0, %v0 871#CHECK: error: instruction requires: vector 872#CHECK: vfeezh %v0, %v0, %v0 873#CHECK: error: instruction requires: vector 874#CHECK: vfeezhs %v0, %v0, %v0 875 876 vfeeb %v0, %v0, %v0 877 vfeebs %v0, %v0, %v0 878 vfeef %v0, %v0, %v0 879 vfeefs %v0, %v0, %v0 880 vfeeh %v0, %v0, %v0 881 vfeehs %v0, %v0, %v0 882 vfeezb %v0, %v0, %v0 883 vfeezbs %v0, %v0, %v0 884 vfeezf %v0, %v0, %v0 885 vfeezfs %v0, %v0, %v0 886 vfeezh %v0, %v0, %v0 887 vfeezhs %v0, %v0, %v0 888 889#CHECK: error: instruction requires: vector 890#CHECK: vfeneb %v0, %v0, %v0 891#CHECK: error: instruction requires: vector 892#CHECK: vfenebs %v0, %v0, %v0 893#CHECK: error: instruction requires: vector 894#CHECK: vfenef %v0, %v0, %v0 895#CHECK: error: instruction requires: vector 896#CHECK: vfenefs %v0, %v0, %v0 897#CHECK: error: instruction requires: vector 898#CHECK: vfeneh %v0, %v0, %v0 899#CHECK: error: instruction requires: vector 900#CHECK: vfenehs %v0, %v0, %v0 901#CHECK: error: instruction requires: vector 902#CHECK: vfenezb %v0, %v0, %v0 903#CHECK: error: instruction requires: vector 904#CHECK: vfenezbs %v0, %v0, %v0 905#CHECK: error: instruction requires: vector 906#CHECK: vfenezf %v0, %v0, %v0 907#CHECK: error: instruction requires: vector 908#CHECK: vfenezfs %v0, %v0, %v0 909#CHECK: error: instruction requires: vector 910#CHECK: vfenezh %v0, %v0, %v0 911#CHECK: error: instruction requires: vector 912#CHECK: vfenezhs %v0, %v0, %v0 913 914 vfeneb %v0, %v0, %v0 915 vfenebs %v0, %v0, %v0 916 vfenef %v0, %v0, %v0 917 vfenefs %v0, %v0, %v0 918 vfeneh %v0, %v0, %v0 919 vfenehs %v0, %v0, %v0 920 vfenezb %v0, %v0, %v0 921 vfenezbs %v0, %v0, %v0 922 vfenezf %v0, %v0, %v0 923 vfenezfs %v0, %v0, %v0 924 vfenezh %v0, %v0, %v0 925 vfenezhs %v0, %v0, %v0 926 927#CHECK: error: instruction requires: vector 928#CHECK: vfidb %v0, %v0, 0, 0 929 930 vfidb %v0, %v0, 0, 0 931 932#CHECK: error: instruction requires: vector 933#CHECK: vflcdb %v0, %v0 934 935 vflcdb %v0, %v0 936 937#CHECK: error: instruction requires: vector 938#CHECK: vflndb %v0, %v0 939 940 vflndb %v0, %v0 941 942#CHECK: error: instruction requires: vector 943#CHECK: vflpdb %v0, %v0 944 945 vflpdb %v0, %v0 946 947#CHECK: error: instruction requires: vector 948#CHECK: vfmadb %v0, %v0, %v0, %v0 949 950 vfmadb %v0, %v0, %v0, %v0 951 952#CHECK: error: instruction requires: vector 953#CHECK: vfmdb %v0, %v0, %v0 954 955 vfmdb %v0, %v0, %v0 956 957#CHECK: error: instruction requires: vector 958#CHECK: vfmsdb %v0, %v0, %v0, %v0 959 960 vfmsdb %v0, %v0, %v0, %v0 961 962#CHECK: error: instruction requires: vector 963#CHECK: vfsdb %v0, %v0, %v0 964 965 vfsdb %v0, %v0, %v0 966 967#CHECK: error: instruction requires: vector 968#CHECK: vfsqdb %v0, %v0 969 970 vfsqdb %v0, %v0 971 972#CHECK: error: instruction requires: vector 973#CHECK: vftcidb %v0, %v0, 0 974 975 vftcidb %v0, %v0, 0 976 977#CHECK: error: instruction requires: vector 978#CHECK: vgbm %v0, 0 979 980 vgbm %v0, 0 981 982#CHECK: error: instruction requires: vector 983#CHECK: vgef %v0, 0(%v0, %r1), 0 984#CHECK: error: instruction requires: vector 985#CHECK: vgeg %v0, 0(%v0, %r1), 0 986 987 vgef %v0, 0(%v0, %r1), 0 988 vgeg %v0, 0(%v0, %r1), 0 989 990#CHECK: error: instruction requires: vector 991#CHECK: vgfmab %v0, %v0, %v0, %v0 992#CHECK: error: instruction requires: vector 993#CHECK: vgfmaf %v0, %v0, %v0, %v0 994#CHECK: error: instruction requires: vector 995#CHECK: vgfmag %v0, %v0, %v0, %v0 996#CHECK: error: instruction requires: vector 997#CHECK: vgfmah %v0, %v0, %v0, %v0 998 999 vgfmab %v0, %v0, %v0, %v0 1000 vgfmaf %v0, %v0, %v0, %v0 1001 vgfmag %v0, %v0, %v0, %v0 1002 vgfmah %v0, %v0, %v0, %v0 1003 1004#CHECK: error: instruction requires: vector 1005#CHECK: vgfmb %v0, %v0, %v0 1006#CHECK: error: instruction requires: vector 1007#CHECK: vgfmf %v0, %v0, %v0 1008#CHECK: error: instruction requires: vector 1009#CHECK: vgfmg %v0, %v0, %v0 1010#CHECK: error: instruction requires: vector 1011#CHECK: vgfmh %v0, %v0, %v0 1012 1013 vgfmb %v0, %v0, %v0 1014 vgfmf %v0, %v0, %v0 1015 vgfmg %v0, %v0, %v0 1016 vgfmh %v0, %v0, %v0 1017 1018#CHECK: error: instruction requires: vector 1019#CHECK: vgmb %v0, 0, 0 1020#CHECK: error: instruction requires: vector 1021#CHECK: vgmf %v0, 0, 0 1022#CHECK: error: instruction requires: vector 1023#CHECK: vgmg %v0, 0, 0 1024#CHECK: error: instruction requires: vector 1025#CHECK: vgmh %v0, 0, 0 1026 1027 vgmb %v0, 0, 0 1028 vgmf %v0, 0, 0 1029 vgmg %v0, 0, 0 1030 vgmh %v0, 0, 0 1031 1032#CHECK: error: instruction requires: vector 1033#CHECK: vistrb %v0, %v0 1034#CHECK: error: instruction requires: vector 1035#CHECK: vistrbs %v0, %v0 1036#CHECK: error: instruction requires: vector 1037#CHECK: vistrf %v0, %v0 1038#CHECK: error: instruction requires: vector 1039#CHECK: vistrfs %v0, %v0 1040#CHECK: error: instruction requires: vector 1041#CHECK: vistrh %v0, %v0 1042#CHECK: error: instruction requires: vector 1043#CHECK: vistrhs %v0, %v0 1044 1045 vistrb %v0, %v0 1046 vistrbs %v0, %v0 1047 vistrf %v0, %v0 1048 vistrfs %v0, %v0 1049 vistrh %v0, %v0 1050 vistrhs %v0, %v0 1051 1052#CHECK: error: instruction requires: vector 1053#CHECK: vl %v0, 0 1054 1055 vl %v0, 0 1056 1057#CHECK: error: instruction requires: vector 1058#CHECK: vlbb %v0, 0, 0 1059 1060 vlbb %v0, 0, 0 1061 1062#CHECK: error: instruction requires: vector 1063#CHECK: vlcb %v0, %v0 1064#CHECK: error: instruction requires: vector 1065#CHECK: vlcf %v0, %v0 1066#CHECK: error: instruction requires: vector 1067#CHECK: vlcg %v0, %v0 1068#CHECK: error: instruction requires: vector 1069#CHECK: vlch %v0, %v0 1070 1071 vlcb %v0, %v0 1072 vlcf %v0, %v0 1073 vlcg %v0, %v0 1074 vlch %v0, %v0 1075 1076#CHECK: error: instruction requires: vector 1077#CHECK: vldeb %v0, %v0 1078 1079 vldeb %v0, %v0 1080 1081#CHECK: error: instruction requires: vector 1082#CHECK: vleb %v0, 0, 0 1083#CHECK: error: instruction requires: vector 1084#CHECK: vlef %v0, 0, 0 1085#CHECK: error: instruction requires: vector 1086#CHECK: vleg %v0, 0, 0 1087#CHECK: error: instruction requires: vector 1088#CHECK: vleh %v0, 0, 0 1089 1090 vleb %v0, 0, 0 1091 vlef %v0, 0, 0 1092 vleg %v0, 0, 0 1093 vleh %v0, 0, 0 1094 1095#CHECK: error: instruction requires: vector 1096#CHECK: vledb %v0, %v0, 0, 0 1097 1098 vledb %v0, %v0, 0, 0 1099 1100#CHECK: error: instruction requires: vector 1101#CHECK: vleib %v0, 0, 0 1102#CHECK: error: instruction requires: vector 1103#CHECK: vleif %v0, 0, 0 1104#CHECK: error: instruction requires: vector 1105#CHECK: vleig %v0, 0, 0 1106#CHECK: error: instruction requires: vector 1107#CHECK: vleih %v0, 0, 0 1108 1109 vleib %v0, 0, 0 1110 vleif %v0, 0, 0 1111 vleig %v0, 0, 0 1112 vleih %v0, 0, 0 1113 1114#CHECK: error: instruction requires: vector 1115#CHECK: vlgvb %r0, %v0, 0 1116#CHECK: error: instruction requires: vector 1117#CHECK: vlgvf %r0, %v0, 0 1118#CHECK: error: instruction requires: vector 1119#CHECK: vlgvg %r0, %v0, 0 1120#CHECK: error: instruction requires: vector 1121#CHECK: vlgvh %r0, %v0, 0 1122 1123 vlgvb %r0, %v0, 0 1124 vlgvf %r0, %v0, 0 1125 vlgvg %r0, %v0, 0 1126 vlgvh %r0, %v0, 0 1127 1128#CHECK: error: instruction requires: vector 1129#CHECK: vll %v0, %r0, 0 1130 1131 vll %v0, %r0, 0 1132 1133#CHECK: error: instruction requires: vector 1134#CHECK: vllezb %v0, 0 1135#CHECK: error: instruction requires: vector 1136#CHECK: vllezf %v0, 0 1137#CHECK: error: instruction requires: vector 1138#CHECK: vllezg %v0, 0 1139#CHECK: error: instruction requires: vector 1140#CHECK: vllezh %v0, 0 1141 1142 vllezb %v0, 0 1143 vllezf %v0, 0 1144 vllezg %v0, 0 1145 vllezh %v0, 0 1146 1147#CHECK: error: instruction requires: vector 1148#CHECK: vlm %v0, %v0, 0 1149 1150 vlm %v0, %v0, 0 1151 1152#CHECK: error: instruction requires: vector 1153#CHECK: vlpb %v0, %v0 1154#CHECK: error: instruction requires: vector 1155#CHECK: vlpf %v0, %v0 1156#CHECK: error: instruction requires: vector 1157#CHECK: vlpg %v0, %v0 1158#CHECK: error: instruction requires: vector 1159#CHECK: vlph %v0, %v0 1160 1161 vlpb %v0, %v0 1162 vlpf %v0, %v0 1163 vlpg %v0, %v0 1164 vlph %v0, %v0 1165 1166#CHECK: error: instruction requires: vector 1167#CHECK: vlr %v0, %v0 1168 1169 vlr %v0, %v0 1170 1171#CHECK: error: instruction requires: vector 1172#CHECK: vlrepb %v0, 0 1173#CHECK: error: instruction requires: vector 1174#CHECK: vlrepf %v0, 0 1175#CHECK: error: instruction requires: vector 1176#CHECK: vlrepg %v0, 0 1177#CHECK: error: instruction requires: vector 1178#CHECK: vlreph %v0, 0 1179 1180 vlrepb %v0, 0 1181 vlrepf %v0, 0 1182 vlrepg %v0, 0 1183 vlreph %v0, 0 1184 1185#CHECK: error: instruction requires: vector 1186#CHECK: vlvgb %v0, %r0, 0 1187#CHECK: error: instruction requires: vector 1188#CHECK: vlvgf %v0, %r0, 0 1189#CHECK: error: instruction requires: vector 1190#CHECK: vlvgg %v0, %r0, 0 1191#CHECK: error: instruction requires: vector 1192#CHECK: vlvgh %v0, %r0, 0 1193 1194 vlvgb %v0, %r0, 0 1195 vlvgf %v0, %r0, 0 1196 vlvgg %v0, %r0, 0 1197 vlvgh %v0, %r0, 0 1198 1199#CHECK: error: instruction requires: vector 1200#CHECK: vlvgp %v0, %r0, %r0 1201 1202 vlvgp %v0, %r0, %r0 1203 1204#CHECK: error: instruction requires: vector 1205#CHECK: vmaeb %v0, %v0, %v0, %v0 1206#CHECK: error: instruction requires: vector 1207#CHECK: vmaef %v0, %v0, %v0, %v0 1208#CHECK: error: instruction requires: vector 1209#CHECK: vmaeh %v0, %v0, %v0, %v0 1210 1211 vmaeb %v0, %v0, %v0, %v0 1212 vmaef %v0, %v0, %v0, %v0 1213 vmaeh %v0, %v0, %v0, %v0 1214 1215#CHECK: error: instruction requires: vector 1216#CHECK: vmahb %v0, %v0, %v0, %v0 1217#CHECK: error: instruction requires: vector 1218#CHECK: vmahf %v0, %v0, %v0, %v0 1219#CHECK: error: instruction requires: vector 1220#CHECK: vmahh %v0, %v0, %v0, %v0 1221 1222 vmahb %v0, %v0, %v0, %v0 1223 vmahf %v0, %v0, %v0, %v0 1224 vmahh %v0, %v0, %v0, %v0 1225 1226#CHECK: error: instruction requires: vector 1227#CHECK: vmalb %v0, %v0, %v0, %v0 1228#CHECK: error: instruction requires: vector 1229#CHECK: vmalf %v0, %v0, %v0, %v0 1230#CHECK: error: instruction requires: vector 1231#CHECK: vmalhw %v0, %v0, %v0, %v0 1232 1233 vmalb %v0, %v0, %v0, %v0 1234 vmalf %v0, %v0, %v0, %v0 1235 vmalhw %v0, %v0, %v0, %v0 1236 1237#CHECK: error: instruction requires: vector 1238#CHECK: vmaleb %v0, %v0, %v0, %v0 1239#CHECK: error: instruction requires: vector 1240#CHECK: vmalef %v0, %v0, %v0, %v0 1241#CHECK: error: instruction requires: vector 1242#CHECK: vmaleh %v0, %v0, %v0, %v0 1243 1244 vmaleb %v0, %v0, %v0, %v0 1245 vmalef %v0, %v0, %v0, %v0 1246 vmaleh %v0, %v0, %v0, %v0 1247 1248#CHECK: error: instruction requires: vector 1249#CHECK: vmalhb %v0, %v0, %v0, %v0 1250#CHECK: error: instruction requires: vector 1251#CHECK: vmalhf %v0, %v0, %v0, %v0 1252#CHECK: error: instruction requires: vector 1253#CHECK: vmalhh %v0, %v0, %v0, %v0 1254 1255 vmalhb %v0, %v0, %v0, %v0 1256 vmalhf %v0, %v0, %v0, %v0 1257 vmalhh %v0, %v0, %v0, %v0 1258 1259#CHECK: error: instruction requires: vector 1260#CHECK: vmalob %v0, %v0, %v0, %v0 1261#CHECK: error: instruction requires: vector 1262#CHECK: vmalof %v0, %v0, %v0, %v0 1263#CHECK: error: instruction requires: vector 1264#CHECK: vmaloh %v0, %v0, %v0, %v0 1265 1266 vmalob %v0, %v0, %v0, %v0 1267 vmalof %v0, %v0, %v0, %v0 1268 vmaloh %v0, %v0, %v0, %v0 1269 1270#CHECK: error: instruction requires: vector 1271#CHECK: vmaob %v0, %v0, %v0, %v0 1272#CHECK: error: instruction requires: vector 1273#CHECK: vmaof %v0, %v0, %v0, %v0 1274#CHECK: error: instruction requires: vector 1275#CHECK: vmaoh %v0, %v0, %v0, %v0 1276 1277 vmaob %v0, %v0, %v0, %v0 1278 vmaof %v0, %v0, %v0, %v0 1279 vmaoh %v0, %v0, %v0, %v0 1280 1281#CHECK: error: instruction requires: vector 1282#CHECK: vmeb %v0, %v0, %v0 1283#CHECK: error: instruction requires: vector 1284#CHECK: vmef %v0, %v0, %v0 1285#CHECK: error: instruction requires: vector 1286#CHECK: vmeh %v0, %v0, %v0 1287 1288 vmeb %v0, %v0, %v0 1289 vmef %v0, %v0, %v0 1290 vmeh %v0, %v0, %v0 1291 1292#CHECK: error: instruction requires: vector 1293#CHECK: vmhb %v0, %v0, %v0 1294#CHECK: error: instruction requires: vector 1295#CHECK: vmhf %v0, %v0, %v0 1296#CHECK: error: instruction requires: vector 1297#CHECK: vmhh %v0, %v0, %v0 1298 1299 vmhb %v0, %v0, %v0 1300 vmhf %v0, %v0, %v0 1301 vmhh %v0, %v0, %v0 1302 1303#CHECK: error: instruction requires: vector 1304#CHECK: vmlb %v0, %v0, %v0 1305#CHECK: error: instruction requires: vector 1306#CHECK: vmlf %v0, %v0, %v0 1307#CHECK: error: instruction requires: vector 1308#CHECK: vmlhw %v0, %v0, %v0 1309 1310 vmlb %v0, %v0, %v0 1311 vmlf %v0, %v0, %v0 1312 vmlhw %v0, %v0, %v0 1313 1314#CHECK: error: instruction requires: vector 1315#CHECK: vmleb %v0, %v0, %v0 1316#CHECK: error: instruction requires: vector 1317#CHECK: vmlef %v0, %v0, %v0 1318#CHECK: error: instruction requires: vector 1319#CHECK: vmleh %v0, %v0, %v0 1320 1321 vmleb %v0, %v0, %v0 1322 vmlef %v0, %v0, %v0 1323 vmleh %v0, %v0, %v0 1324 1325#CHECK: error: instruction requires: vector 1326#CHECK: vmlhb %v0, %v0, %v0 1327#CHECK: error: instruction requires: vector 1328#CHECK: vmlhf %v0, %v0, %v0 1329#CHECK: error: instruction requires: vector 1330#CHECK: vmlhh %v0, %v0, %v0 1331 1332 vmlhb %v0, %v0, %v0 1333 vmlhf %v0, %v0, %v0 1334 vmlhh %v0, %v0, %v0 1335 1336#CHECK: error: instruction requires: vector 1337#CHECK: vmlob %v0, %v0, %v0 1338#CHECK: error: instruction requires: vector 1339#CHECK: vmlof %v0, %v0, %v0 1340#CHECK: error: instruction requires: vector 1341#CHECK: vmloh %v0, %v0, %v0 1342 1343 vmlob %v0, %v0, %v0 1344 vmlof %v0, %v0, %v0 1345 vmloh %v0, %v0, %v0 1346 1347#CHECK: error: instruction requires: vector 1348#CHECK: vmnb %v0, %v0, %v0 1349#CHECK: error: instruction requires: vector 1350#CHECK: vmnf %v0, %v0, %v0 1351#CHECK: error: instruction requires: vector 1352#CHECK: vmng %v0, %v0, %v0 1353#CHECK: error: instruction requires: vector 1354#CHECK: vmnh %v0, %v0, %v0 1355 1356 vmnb %v0, %v0, %v0 1357 vmnf %v0, %v0, %v0 1358 vmng %v0, %v0, %v0 1359 vmnh %v0, %v0, %v0 1360 1361#CHECK: error: instruction requires: vector 1362#CHECK: vmnlb %v0, %v0, %v0 1363#CHECK: error: instruction requires: vector 1364#CHECK: vmnlf %v0, %v0, %v0 1365#CHECK: error: instruction requires: vector 1366#CHECK: vmnlg %v0, %v0, %v0 1367#CHECK: error: instruction requires: vector 1368#CHECK: vmnlh %v0, %v0, %v0 1369 1370 vmnlb %v0, %v0, %v0 1371 vmnlf %v0, %v0, %v0 1372 vmnlg %v0, %v0, %v0 1373 vmnlh %v0, %v0, %v0 1374 1375#CHECK: error: instruction requires: vector 1376#CHECK: vmob %v0, %v0, %v0 1377#CHECK: error: instruction requires: vector 1378#CHECK: vmof %v0, %v0, %v0 1379#CHECK: error: instruction requires: vector 1380#CHECK: vmoh %v0, %v0, %v0 1381 1382 vmob %v0, %v0, %v0 1383 vmof %v0, %v0, %v0 1384 vmoh %v0, %v0, %v0 1385 1386#CHECK: error: instruction requires: vector 1387#CHECK: vmrhb %v0, %v0, %v0 1388#CHECK: error: instruction requires: vector 1389#CHECK: vmrhf %v0, %v0, %v0 1390#CHECK: error: instruction requires: vector 1391#CHECK: vmrhg %v0, %v0, %v0 1392#CHECK: error: instruction requires: vector 1393#CHECK: vmrhh %v0, %v0, %v0 1394 1395 vmrhb %v0, %v0, %v0 1396 vmrhf %v0, %v0, %v0 1397 vmrhg %v0, %v0, %v0 1398 vmrhh %v0, %v0, %v0 1399 1400#CHECK: error: instruction requires: vector 1401#CHECK: vmrlb %v0, %v0, %v0 1402#CHECK: error: instruction requires: vector 1403#CHECK: vmrlf %v0, %v0, %v0 1404#CHECK: error: instruction requires: vector 1405#CHECK: vmrlg %v0, %v0, %v0 1406#CHECK: error: instruction requires: vector 1407#CHECK: vmrlh %v0, %v0, %v0 1408 1409 vmrlb %v0, %v0, %v0 1410 vmrlf %v0, %v0, %v0 1411 vmrlg %v0, %v0, %v0 1412 vmrlh %v0, %v0, %v0 1413 1414#CHECK: error: instruction requires: vector 1415#CHECK: vmxb %v0, %v0, %v0 1416#CHECK: error: instruction requires: vector 1417#CHECK: vmxf %v0, %v0, %v0 1418#CHECK: error: instruction requires: vector 1419#CHECK: vmxg %v0, %v0, %v0 1420#CHECK: error: instruction requires: vector 1421#CHECK: vmxh %v0, %v0, %v0 1422 1423 vmxb %v0, %v0, %v0 1424 vmxf %v0, %v0, %v0 1425 vmxg %v0, %v0, %v0 1426 vmxh %v0, %v0, %v0 1427 1428#CHECK: error: instruction requires: vector 1429#CHECK: vmxlb %v0, %v0, %v0 1430#CHECK: error: instruction requires: vector 1431#CHECK: vmxlf %v0, %v0, %v0 1432#CHECK: error: instruction requires: vector 1433#CHECK: vmxlg %v0, %v0, %v0 1434#CHECK: error: instruction requires: vector 1435#CHECK: vmxlh %v0, %v0, %v0 1436 1437 vmxlb %v0, %v0, %v0 1438 vmxlf %v0, %v0, %v0 1439 vmxlg %v0, %v0, %v0 1440 vmxlh %v0, %v0, %v0 1441 1442#CHECK: error: instruction requires: vector 1443#CHECK: vn %v0, %v0, %v0 1444 1445 vn %v0, %v0, %v0 1446 1447#CHECK: error: instruction requires: vector 1448#CHECK: vnc %v0, %v0, %v0 1449 1450 vnc %v0, %v0, %v0 1451 1452#CHECK: error: instruction requires: vector 1453#CHECK: vno %v0, %v0, %v0 1454 1455 vno %v0, %v0, %v0 1456 1457#CHECK: error: instruction requires: vector 1458#CHECK: vo %v0, %v0, %v0 1459 1460 vo %v0, %v0, %v0 1461 1462#CHECK: error: instruction requires: vector 1463#CHECK: vone %v0 1464 1465 vone %v0 1466 1467#CHECK: error: instruction requires: vector 1468#CHECK: vpdi %v0, %v0, %v0, 0 1469 1470 vpdi %v0, %v0, %v0, 0 1471 1472#CHECK: error: instruction requires: vector 1473#CHECK: vperm %v0, %v0, %v0, %v0 1474 1475 vperm %v0, %v0, %v0, %v0 1476 1477#CHECK: error: instruction requires: vector 1478#CHECK: vpkf %v0, %v0, %v0 1479#CHECK: error: instruction requires: vector 1480#CHECK: vpkg %v0, %v0, %v0 1481#CHECK: error: instruction requires: vector 1482#CHECK: vpkh %v0, %v0, %v0 1483 1484 vpkf %v0, %v0, %v0 1485 vpkg %v0, %v0, %v0 1486 vpkh %v0, %v0, %v0 1487 1488#CHECK: error: instruction requires: vector 1489#CHECK: vpklsf %v0, %v0, %v0 1490#CHECK: error: instruction requires: vector 1491#CHECK: vpklsfs %v0, %v0, %v0 1492#CHECK: error: instruction requires: vector 1493#CHECK: vpklsg %v0, %v0, %v0 1494#CHECK: error: instruction requires: vector 1495#CHECK: vpklsgs %v0, %v0, %v0 1496#CHECK: error: instruction requires: vector 1497#CHECK: vpklsh %v0, %v0, %v0 1498#CHECK: error: instruction requires: vector 1499#CHECK: vpklshs %v0, %v0, %v0 1500 1501 vpklsf %v0, %v0, %v0 1502 vpklsfs %v0, %v0, %v0 1503 vpklsg %v0, %v0, %v0 1504 vpklsgs %v0, %v0, %v0 1505 vpklsh %v0, %v0, %v0 1506 vpklshs %v0, %v0, %v0 1507 1508#CHECK: error: instruction requires: vector 1509#CHECK: vpksf %v0, %v0, %v0 1510#CHECK: error: instruction requires: vector 1511#CHECK: vpksfs %v0, %v0, %v0 1512#CHECK: error: instruction requires: vector 1513#CHECK: vpksg %v0, %v0, %v0 1514#CHECK: error: instruction requires: vector 1515#CHECK: vpksgs %v0, %v0, %v0 1516#CHECK: error: instruction requires: vector 1517#CHECK: vpksh %v0, %v0, %v0 1518#CHECK: error: instruction requires: vector 1519#CHECK: vpkshs %v0, %v0, %v0 1520 1521 vpksf %v0, %v0, %v0 1522 vpksfs %v0, %v0, %v0 1523 vpksg %v0, %v0, %v0 1524 vpksgs %v0, %v0, %v0 1525 vpksh %v0, %v0, %v0 1526 vpkshs %v0, %v0, %v0 1527 1528#CHECK: error: instruction requires: vector 1529#CHECK: vpopct %v0, %v0, 0 1530 1531 vpopct %v0, %v0, 0 1532 1533#CHECK: error: instruction requires: vector 1534#CHECK: vrepb %v0, %v0, 0 1535#CHECK: error: instruction requires: vector 1536#CHECK: vrepf %v0, %v0, 0 1537#CHECK: error: instruction requires: vector 1538#CHECK: vrepg %v0, %v0, 0 1539#CHECK: error: instruction requires: vector 1540#CHECK: vreph %v0, %v0, 0 1541 1542 vrepb %v0, %v0, 0 1543 vrepf %v0, %v0, 0 1544 vrepg %v0, %v0, 0 1545 vreph %v0, %v0, 0 1546 1547#CHECK: error: instruction requires: vector 1548#CHECK: vrepib %v0, 0 1549#CHECK: error: instruction requires: vector 1550#CHECK: vrepif %v0, 0 1551#CHECK: error: instruction requires: vector 1552#CHECK: vrepig %v0, 0 1553#CHECK: error: instruction requires: vector 1554#CHECK: vrepih %v0, 0 1555 1556 vrepib %v0, 0 1557 vrepif %v0, 0 1558 vrepig %v0, 0 1559 vrepih %v0, 0 1560 1561#CHECK: error: instruction requires: vector 1562#CHECK: vsb %v0, %v0, %v0 1563#CHECK: error: instruction requires: vector 1564#CHECK: vsf %v0, %v0, %v0 1565#CHECK: error: instruction requires: vector 1566#CHECK: vsg %v0, %v0, %v0 1567#CHECK: error: instruction requires: vector 1568#CHECK: vsh %v0, %v0, %v0 1569#CHECK: error: instruction requires: vector 1570#CHECK: vsq %v0, %v0, %v0 1571 1572 vsb %v0, %v0, %v0 1573 vsf %v0, %v0, %v0 1574 vsg %v0, %v0, %v0 1575 vsh %v0, %v0, %v0 1576 vsq %v0, %v0, %v0 1577 1578#CHECK: error: instruction requires: vector 1579#CHECK: vsbcbiq %v0, %v0, %v0, %v0 1580 1581 vsbcbiq %v0, %v0, %v0, %v0 1582 1583#CHECK: error: instruction requires: vector 1584#CHECK: vsbiq %v0, %v0, %v0, %v0 1585 1586 vsbiq %v0, %v0, %v0, %v0 1587 1588#CHECK: error: instruction requires: vector 1589#CHECK: vscbib %v0, %v0, %v0 1590#CHECK: error: instruction requires: vector 1591#CHECK: vscbif %v0, %v0, %v0 1592#CHECK: error: instruction requires: vector 1593#CHECK: vscbig %v0, %v0, %v0 1594#CHECK: error: instruction requires: vector 1595#CHECK: vscbih %v0, %v0, %v0 1596#CHECK: error: instruction requires: vector 1597#CHECK: vscbiq %v0, %v0, %v0 1598 1599 vscbib %v0, %v0, %v0 1600 vscbif %v0, %v0, %v0 1601 vscbig %v0, %v0, %v0 1602 vscbih %v0, %v0, %v0 1603 vscbiq %v0, %v0, %v0 1604 1605#CHECK: error: instruction requires: vector 1606#CHECK: vscef %v0, 0(%v0, %r1), 0 1607#CHECK: error: instruction requires: vector 1608#CHECK: vsceg %v0, 0(%v0, %r1), 0 1609 1610 vscef %v0, 0(%v0, %r1), 0 1611 vsceg %v0, 0(%v0, %r1), 0 1612 1613#CHECK: error: instruction requires: vector 1614#CHECK: vsegb %v0, %v0 1615#CHECK: error: instruction requires: vector 1616#CHECK: vsegf %v0, %v0 1617#CHECK: error: instruction requires: vector 1618#CHECK: vsegh %v0, %v0 1619 1620 vsegb %v0, %v0 1621 vsegf %v0, %v0 1622 vsegh %v0, %v0 1623 1624#CHECK: error: instruction requires: vector 1625#CHECK: vsel %v0, %v0, %v0, %v0 1626 1627 vsel %v0, %v0, %v0, %v0 1628 1629#CHECK: error: instruction requires: vector 1630#CHECK: vsl %v0, %v0, %v0 1631 1632 vsl %v0, %v0, %v0 1633 1634#CHECK: error: instruction requires: vector 1635#CHECK: vslb %v0, %v0, %v0 1636 1637 vslb %v0, %v0, %v0 1638 1639#CHECK: error: instruction requires: vector 1640#CHECK: vsldb %v0, %v0, %v0, 0 1641 1642 vsldb %v0, %v0, %v0, 0 1643 1644#CHECK: error: instruction requires: vector 1645#CHECK: vsra %v0, %v0, %v0 1646 1647 vsra %v0, %v0, %v0 1648 1649#CHECK: error: instruction requires: vector 1650#CHECK: vsrab %v0, %v0, %v0 1651 1652 vsrab %v0, %v0, %v0 1653 1654#CHECK: error: instruction requires: vector 1655#CHECK: vsrl %v0, %v0, %v0 1656 1657 vsrl %v0, %v0, %v0 1658 1659#CHECK: error: instruction requires: vector 1660#CHECK: vsrlb %v0, %v0, %v0 1661 1662 vsrlb %v0, %v0, %v0 1663 1664#CHECK: error: instruction requires: vector 1665#CHECK: vst %v0, 0 1666 1667 vst %v0, 0 1668 1669#CHECK: error: instruction requires: vector 1670#CHECK: vstl %v0, %r0, 0 1671 1672 vstl %v0, %r0, 0 1673 1674#CHECK: error: instruction requires: vector 1675#CHECK: vstm %v0, %v0, 0 1676 1677 vstm %v0, %v0, 0 1678 1679#CHECK: error: instruction requires: vector 1680#CHECK: vstrcb %v0, %v0, %v0, %v0 1681#CHECK: error: instruction requires: vector 1682#CHECK: vstrcbs %v0, %v0, %v0, %v0 1683#CHECK: error: instruction requires: vector 1684#CHECK: vstrcf %v0, %v0, %v0, %v0 1685#CHECK: error: instruction requires: vector 1686#CHECK: vstrcfs %v0, %v0, %v0, %v0 1687#CHECK: error: instruction requires: vector 1688#CHECK: vstrch %v0, %v0, %v0, %v0 1689#CHECK: error: instruction requires: vector 1690#CHECK: vstrchs %v0, %v0, %v0, %v0 1691#CHECK: error: instruction requires: vector 1692#CHECK: vstrczb %v0, %v0, %v0, %v0 1693#CHECK: error: instruction requires: vector 1694#CHECK: vstrczbs %v0, %v0, %v0, %v0 1695#CHECK: error: instruction requires: vector 1696#CHECK: vstrczf %v0, %v0, %v0, %v0 1697#CHECK: error: instruction requires: vector 1698#CHECK: vstrczfs %v0, %v0, %v0, %v0 1699#CHECK: error: instruction requires: vector 1700#CHECK: vstrczh %v0, %v0, %v0, %v0 1701#CHECK: error: instruction requires: vector 1702#CHECK: vstrczhs %v0, %v0, %v0, %v0 1703 1704 vstrcb %v0, %v0, %v0, %v0 1705 vstrcbs %v0, %v0, %v0, %v0 1706 vstrcf %v0, %v0, %v0, %v0 1707 vstrcfs %v0, %v0, %v0, %v0 1708 vstrch %v0, %v0, %v0, %v0 1709 vstrchs %v0, %v0, %v0, %v0 1710 vstrczb %v0, %v0, %v0, %v0 1711 vstrczbs %v0, %v0, %v0, %v0 1712 vstrczf %v0, %v0, %v0, %v0 1713 vstrczfs %v0, %v0, %v0, %v0 1714 vstrczh %v0, %v0, %v0, %v0 1715 vstrczhs %v0, %v0, %v0, %v0 1716 1717#CHECK: error: instruction requires: vector 1718#CHECK: vsumb %v0, %v0, %v0 1719#CHECK: error: instruction requires: vector 1720#CHECK: vsumh %v0, %v0, %v0 1721 1722 vsumb %v0, %v0, %v0 1723 vsumh %v0, %v0, %v0 1724 1725#CHECK: error: instruction requires: vector 1726#CHECK: vsumgh %v0, %v0, %v0 1727#CHECK: error: instruction requires: vector 1728#CHECK: vsumgf %v0, %v0, %v0 1729 1730 vsumgh %v0, %v0, %v0 1731 vsumgf %v0, %v0, %v0 1732 1733#CHECK: error: instruction requires: vector 1734#CHECK: vsumqf %v0, %v0, %v0 1735#CHECK: error: instruction requires: vector 1736#CHECK: vsumqg %v0, %v0, %v0 1737 1738 vsumqf %v0, %v0, %v0 1739 vsumqg %v0, %v0, %v0 1740 1741#CHECK: error: instruction requires: vector 1742#CHECK: vtm %v0, %v0 1743 1744 vtm %v0, %v0 1745 1746#CHECK: error: instruction requires: vector 1747#CHECK: vuphb %v0, %v0 1748#CHECK: error: instruction requires: vector 1749#CHECK: vuphf %v0, %v0 1750#CHECK: error: instruction requires: vector 1751#CHECK: vuphh %v0, %v0 1752 1753 vuphb %v0, %v0 1754 vuphf %v0, %v0 1755 vuphh %v0, %v0 1756 1757#CHECK: error: instruction requires: vector 1758#CHECK: vuplb %v0, %v0 1759#CHECK: error: instruction requires: vector 1760#CHECK: vuplf %v0, %v0 1761#CHECK: error: instruction requires: vector 1762#CHECK: vuplhw %v0, %v0 1763 1764 vuplb %v0, %v0 1765 vuplf %v0, %v0 1766 vuplhw %v0, %v0 1767 1768#CHECK: error: instruction requires: vector 1769#CHECK: vuplhb %v0, %v0 1770#CHECK: error: instruction requires: vector 1771#CHECK: vuplhf %v0, %v0 1772#CHECK: error: instruction requires: vector 1773#CHECK: vuplhh %v0, %v0 1774 1775 vuplhb %v0, %v0 1776 vuplhf %v0, %v0 1777 vuplhh %v0, %v0 1778 1779#CHECK: error: instruction requires: vector 1780#CHECK: vupllb %v0, %v0 1781#CHECK: error: instruction requires: vector 1782#CHECK: vupllf %v0, %v0 1783#CHECK: error: instruction requires: vector 1784#CHECK: vupllh %v0, %v0 1785 1786 vupllb %v0, %v0 1787 vupllf %v0, %v0 1788 vupllh %v0, %v0 1789 1790#CHECK: error: instruction requires: vector 1791#CHECK: vx %v0, %v0, %v0 1792 1793 vx %v0, %v0, %v0 1794 1795#CHECK: error: instruction requires: vector 1796#CHECK: vzero %v0 1797 1798 vzero %v0 1799 1800#CHECK: error: instruction requires: vector 1801#CHECK: wcdgb %v0, %v0, 0, 0 1802 1803 wcdgb %v0, %v0, 0, 0 1804 1805#CHECK: error: instruction requires: vector 1806#CHECK: wcdlgb %v0, %v0, 0, 0 1807 1808 wcdlgb %v0, %v0, 0, 0 1809 1810#CHECK: error: instruction requires: vector 1811#CHECK: wcgdb %v0, %v0, 0, 0 1812 1813 wcgdb %v0, %v0, 0, 0 1814 1815#CHECK: error: instruction requires: vector 1816#CHECK: wclgdb %v0, %v0, 0, 0 1817 1818 wclgdb %v0, %v0, 0, 0 1819 1820#CHECK: error: instruction requires: vector 1821#CHECK: wfadb %v0, %v0, %v0 1822 1823 wfadb %v0, %v0, %v0 1824 1825#CHECK: error: instruction requires: vector 1826#CHECK: wfcdb %v0, %v0 1827 1828 wfcdb %v0, %v0 1829 1830#CHECK: error: instruction requires: vector 1831#CHECK: wfcedb %v0, %v0, %v0 1832#CHECK: wfcedbs %v0, %v0, %v0 1833 1834 wfcedb %v0, %v0, %v0 1835 wfcedbs %v0, %v0, %v0 1836 1837#CHECK: error: instruction requires: vector 1838#CHECK: wfchdb %v0, %v0, %v0 1839#CHECK: wfchdbs %v0, %v0, %v0 1840 1841 wfchdb %v0, %v0, %v0 1842 wfchdbs %v0, %v0, %v0 1843 1844#CHECK: error: instruction requires: vector 1845#CHECK: wfchedb %v0, %v0, %v0 1846#CHECK: wfchedbs %v0, %v0, %v0 1847 1848 wfchedb %v0, %v0, %v0 1849 wfchedbs %v0, %v0, %v0 1850 1851#CHECK: error: instruction requires: vector 1852#CHECK: wfddb %v0, %v0, %v0 1853 1854 wfddb %v0, %v0, %v0 1855 1856#CHECK: error: instruction requires: vector 1857#CHECK: wfidb %v0, %v0, 0, 0 1858 1859 wfidb %v0, %v0, 0, 0 1860 1861#CHECK: error: instruction requires: vector 1862#CHECK: wfkdb %v0, %v0 1863 1864 wfkdb %v0, %v0 1865 1866#CHECK: error: instruction requires: vector 1867#CHECK: wflcdb %v0, %v0 1868 1869 wflcdb %v0, %v0 1870 1871#CHECK: error: instruction requires: vector 1872#CHECK: wflndb %v0, %v0 1873 1874 wflndb %v0, %v0 1875 1876#CHECK: error: instruction requires: vector 1877#CHECK: wflpdb %v0, %v0 1878 1879 wflpdb %v0, %v0 1880 1881#CHECK: error: instruction requires: vector 1882#CHECK: wfmadb %v0, %v0, %v0, %v0 1883 1884 wfmadb %v0, %v0, %v0, %v0 1885 1886#CHECK: error: instruction requires: vector 1887#CHECK: wfmdb %v0, %v0, %v0 1888 1889 wfmdb %v0, %v0, %v0 1890 1891#CHECK: error: instruction requires: vector 1892#CHECK: wfmsdb %v0, %v0, %v0, %v0 1893 1894 wfmsdb %v0, %v0, %v0, %v0 1895 1896#CHECK: error: instruction requires: vector 1897#CHECK: wfsdb %v0, %v0, %v0 1898 1899 wfsdb %v0, %v0, %v0 1900 1901#CHECK: error: instruction requires: vector 1902#CHECK: wfsqdb %v0, %v0 1903 1904 wfsqdb %v0, %v0 1905 1906#CHECK: error: instruction requires: vector 1907#CHECK: wftcidb %v0, %v0, 0 1908 1909 wftcidb %v0, %v0, 0 1910 1911#CHECK: error: instruction requires: vector 1912#CHECK: wldeb %v0, %v0 1913 1914 wldeb %v0, %v0 1915 1916#CHECK: error: instruction requires: vector 1917#CHECK: wledb %v0, %v0, 0, 0 1918 1919 wledb %v0, %v0, 0, 0 1920 1921