1# RUN: llvm-mc %s -triple=riscv32 -mattr=+zfh -M no-aliases \ 2# RUN: | FileCheck -check-prefix=CHECK-INST %s 3# RUN: llvm-mc %s -triple=riscv32 -mattr=+zfh \ 4# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s 5# RUN: llvm-mc %s -triple=riscv64 -mattr=+zfh -M no-aliases \ 6# RUN: | FileCheck -check-prefix=CHECK-INST %s 7# RUN: llvm-mc %s -triple=riscv64 -mattr=+zfh \ 8# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s 9# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zfh < %s \ 10# RUN: | llvm-objdump -d --mattr=+zfh --no-print-imm-hex -M no-aliases - \ 11# RUN: | FileCheck -check-prefix=CHECK-INST %s 12# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zfh < %s \ 13# RUN: | llvm-objdump -d --mattr=+zfh --no-print-imm-hex - \ 14# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s 15# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zfh < %s \ 16# RUN: | llvm-objdump -d --mattr=+zfh --no-print-imm-hex -M no-aliases - \ 17# RUN: | FileCheck -check-prefix=CHECK-INST %s 18# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zfh < %s \ 19# RUN: | llvm-objdump -d --mattr=+zfh --no-print-imm-hex - \ 20# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s 21 22##===----------------------------------------------------------------------===## 23## Assembler Pseudo Instructions (User-Level ISA, Version 2.2, Chapter 20) 24##===----------------------------------------------------------------------===## 25 26# CHECK-INST: fsgnj.h ft0, ft1, ft1 27# CHECK-ALIAS: fmv.h ft0, ft1 28fmv.h f0, f1 29# CHECK-INST: fsgnjx.h ft1, ft2, ft2 30# CHECK-ALIAS: fabs.h ft1, ft2 31fabs.h f1, f2 32# CHECK-INST: fsgnjn.h ft2, ft3, ft3 33# CHECK-ALIAS: fneg.h ft2, ft3 34fneg.h f2, f3 35 36# CHECK-INST: flt.h tp, ft6, ft5 37# CHECK-ALIAS: flt.h tp, ft6, ft5 38fgt.h x4, f5, f6 39# CHECK-INST: fle.h t2, fs1, fs0 40# CHECK-ALIAS: fle.h t2, fs1, fs0 41fge.h x7, f8, f9 42 43# CHECK-INST: fmv.x.h a2, fs7 44# CHECK-ALIAS: fmv.x.h a2, fs7 45fmv.x.h a2, fs7 46# CHECK-INST: fmv.h.x ft1, a6 47# CHECK-ALIAS: fmv.h.x ft1, a6 48fmv.h.x ft1, a6 49 50# CHECK-INST: flh ft0, 0(a0) 51# CHECK-ALIAS: flh ft0, 0(a0) 52flh f0, (x10) 53# CHECK-INST: fsh ft0, 0(a0) 54# CHECK-ALIAS: fsh ft0, 0(a0) 55fsh f0, (x10) 56 57##===----------------------------------------------------------------------===## 58## Aliases which omit the rounding mode. 59##===----------------------------------------------------------------------===## 60 61# CHECK-INST: fmadd.h fa0, fa1, fa2, fa3, dyn 62# CHECK-ALIAS: fmadd.h fa0, fa1, fa2, fa3{{[[:space:]]}} 63fmadd.h f10, f11, f12, f13 64# CHECK-INST: fmsub.h fa4, fa5, fa6, fa7, dyn 65# CHECK-ALIAS: fmsub.h fa4, fa5, fa6, fa7{{[[:space:]]}} 66fmsub.h f14, f15, f16, f17 67# CHECK-INST: fnmsub.h fs2, fs3, fs4, fs5, dyn 68# CHECK-ALIAS: fnmsub.h fs2, fs3, fs4, fs5{{[[:space:]]}} 69fnmsub.h f18, f19, f20, f21 70# CHECK-INST: fnmadd.h fs6, fs7, fs8, fs9, dyn 71# CHECK-ALIAS: fnmadd.h fs6, fs7, fs8, fs9{{[[:space:]]}} 72fnmadd.h f22, f23, f24, f25 73# CHECK-INST: fadd.h fs10, fs11, ft8, dyn 74# CHECK-ALIAS: fadd.h fs10, fs11, ft8{{[[:space:]]}} 75fadd.h f26, f27, f28 76# CHECK-INST: fsub.h ft9, ft10, ft11, dyn 77# CHECK-ALIAS: fsub.h ft9, ft10, ft11{{[[:space:]]}} 78fsub.h f29, f30, f31 79# CHECK-INST: fmul.h ft0, ft1, ft2, dyn 80# CHECK-ALIAS: fmul.h ft0, ft1, ft2{{[[:space:]]}} 81fmul.h ft0, ft1, ft2 82# CHECK-INST: fdiv.h ft3, ft4, ft5, dyn 83# CHECK-ALIAS: fdiv.h ft3, ft4, ft5{{[[:space:]]}} 84fdiv.h ft3, ft4, ft5 85# CHECK-INST: fsqrt.h ft6, ft7, dyn 86# CHECK-ALIAS: fsqrt.h ft6, ft7{{[[:space:]]}} 87fsqrt.h ft6, ft7 88# CHECK-INST: fcvt.w.h a0, fs5, dyn 89# CHECK-ALIAS: fcvt.w.h a0, fs5{{[[:space:]]}} 90fcvt.w.h a0, fs5 91# CHECK-INST: fcvt.wu.h a1, fs6, dyn 92# CHECK-ALIAS: fcvt.wu.h a1, fs6{{[[:space:]]}} 93fcvt.wu.h a1, fs6 94# CHECK-INST: fcvt.h.w ft11, a4, dyn 95# CHECK-ALIAS: fcvt.h.w ft11, a4{{[[:space:]]}} 96fcvt.h.w ft11, a4 97# CHECK-INST: fcvt.h.wu ft0, a5, dyn 98# CHECK-ALIAS: fcvt.h.wu ft0, a5{{[[:space:]]}} 99fcvt.h.wu ft0, a5 100