xref: /llvm-project/llvm/test/MC/RISCV/rv64zfinx-invalid.s (revision eec05bfeafe9389e190932e0efbfbed11198311e)
1# RUN: not llvm-mc -triple riscv64 -mattr=+zfinx %s 2>&1 | FileCheck %s
2
3# Not support float registers
4flw fa4, 12(sp) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'F' (Single-Precision Floating-Point){{$}}
5
6# Invalid instructions
7fsw a5, 12(sp) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction
8fmv.x.w t2, a2 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
9fmv.w.x a5, t5 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
10
11# FP registers where integer regs are expected
12fcvt.s.l a2, ft2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
13fcvt.s.lu a3, ft3 # CHECK: :[[@LINE]]:15: error: invalid operand for instruction
14