1# RUN: llvm-mc %s -triple=riscv64 -M no-aliases -mattr=+e -show-encoding \ 2# RUN: | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s 3# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+e < %s \ 4# RUN: | llvm-objdump --no-print-imm-hex -M no-aliases -d -r - \ 5# RUN: | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s 6 7# This file provides a basic test for RV64E, checking that the expected 8# set of registers and instructions are accepted. It only tests instructions 9# that are not valid in RV32E. 10 11# CHECK-ASM-AND-OBJ: ld a4, 25(a5) 12ld x14, 25(x15) 13# CHECK-ASM-AND-OBJ: sd a2, 36(a3) 14sd a2, 36(a3) 15 16# CHECK-ASM-AND-OBJ: addiw a4, a5, 37 17addiw a4, a5, 37 18# CHECK-ASM-AND-OBJ: slliw t1, t1, 31 19slliw t1, t1, 31 20# CHECK-ASM-AND-OBJ: srliw a0, a4, 0 21srliw a0, a4, 0 22# CHECK-ASM-AND-OBJ: sraiw a1, sp, 15 23sraiw a1, sp, 15 24# CHECK-ASM-AND-OBJ: slliw t0, t1, 13 25slliw t0, t1, 13 26 27# CHECK-ASM-AND-OBJ: addw ra, zero, zero 28addw ra, zero, zero 29# CHECK-ASM-AND-OBJ: subw t0, t2, t1 30subw t0, t2, t1 31# CHECK-ASM-AND-OBJ: sllw a5, a4, a3 32sllw a5, a4, a3 33# CHECK-ASM-AND-OBJ: srlw a0, s0, t0 34srlw a0, s0, t0 35# CHECK-ASM-AND-OBJ: sraw t0, a3, zero 36sraw t0, a3, zero 37