xref: /llvm-project/llvm/test/MC/RISCV/rv64d-invalid.s (revision 72281a228b77796a07f0314c4f0ce081119319f1) 
1# RUN: not llvm-mc -triple riscv64 -mattr=+d < %s 2>&1 | FileCheck %s
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3# Integer registers where FP regs are expected
4fcvt.l.d ft0, a0 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
5fcvt.lu.d ft1, a1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
6fmv.x.d ft2, a2 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
7
8# FP registers where integer regs are expected
9fcvt.d.l a3, ft3 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
10fcvt.d.lu a4, ft4 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
11fmv.d.x a5, ft5 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
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