xref: /llvm-project/llvm/test/MC/RISCV/rv32xtheadmac-invalid.s (revision d4012bc43f9a752d77f464286d91f72f4c6970ee) 
1# RUN: not llvm-mc -triple riscv32 -mattr=+xtheadmac < %s 2>&1 | FileCheck %s
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3th.mulaw  t0, t1, t2     # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
4th.mulsw  t0, t1, t2     # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
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