xref: /llvm-project/llvm/test/MC/RISCV/hypervisor-csr-names.s (revision 4b3d439e7e7b4e794e523caea9863d67ff8cf85f)
1# RUN: llvm-mc %s -triple=riscv32 -M no-aliases -show-encoding \
2# RUN:     | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
3# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
4# RUN:     | llvm-objdump -d - \
5# RUN:     | FileCheck -check-prefix=CHECK-INST-ALIAS %s
6#
7# RUN: llvm-mc %s -triple=riscv64 -M no-aliases -show-encoding \
8# RUN:     | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
9# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
10# RUN:     | llvm-objdump -d - \
11# RUN:     | FileCheck -check-prefix=CHECK-INST-ALIAS %s
12
13##################################
14# Hypervisor Trap Setup
15##################################
16
17# hstatus
18# name
19# CHECK-INST: csrrs t1, hstatus, zero
20# CHECK-ENC: encoding: [0x73,0x23,0x00,0x60]
21# CHECK-INST-ALIAS: csrr t1, hstatus
22# uimm12
23# CHECK-INST: csrrs t2, hstatus, zero
24# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x60]
25# CHECK-INST-ALIAS: csrr t2, hstatus
26# name
27csrrs t1, hstatus, zero
28# uimm12
29csrrs t2, 0x600, zero
30
31# hedeleg
32# name
33# CHECK-INST: csrrs t1, hedeleg, zero
34# CHECK-ENC: encoding: [0x73,0x23,0x20,0x60]
35# CHECK-INST-ALIAS: csrr t1, hedeleg
36# uimm12
37# CHECK-INST: csrrs t2, hedeleg, zero
38# CHECK-ENC: encoding: [0xf3,0x23,0x20,0x60]
39# CHECK-INST-ALIAS: csrr t2, hedeleg
40# name
41csrrs t1, hedeleg, zero
42# uimm12
43csrrs t2, 0x602, zero
44
45# hideleg
46# name
47# CHECK-INST: csrrs t1, hideleg, zero
48# CHECK-ENC: encoding: [0x73,0x23,0x30,0x60]
49# CHECK-INST-ALIAS: csrr t1, hideleg
50# uimm12
51# CHECK-INST: csrrs t2, hideleg, zero
52# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x60]
53# CHECK-INST-ALIAS: csrr t2, hideleg
54# name
55csrrs t1, hideleg, zero
56# uimm12
57csrrs t2, 0x603, zero
58
59# hie
60# name
61# CHECK-INST: csrrs t1, hie, zero
62# CHECK-ENC: encoding: [0x73,0x23,0x40,0x60]
63# CHECK-INST-ALIAS: csrr t1, hie
64# uimm12
65# CHECK-INST: csrrs t2, hie, zero
66# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x60]
67# CHECK-INST-ALIAS: csrr t2, hie
68# name
69csrrs t1, hie, zero
70# uimm12
71csrrs t2, 0x604, zero
72
73# hcounteren
74# name
75# CHECK-INST: csrrs t1, hcounteren, zero
76# CHECK-ENC: encoding: [0x73,0x23,0x60,0x60]
77# CHECK-INST-ALIAS: csrr t1, hcounteren
78# uimm12
79# CHECK-INST: csrrs t2, hcounteren, zero
80# CHECK-ENC: encoding: [0xf3,0x23,0x60,0x60]
81# CHECK-INST-ALIAS: csrr t2, hcounteren
82# name
83csrrs t1, hcounteren, zero
84# uimm12
85csrrs t2, 0x606, zero
86
87# hgeie
88# name
89# CHECK-INST: csrrs t1, hgeie, zero
90# CHECK-ENC: encoding: [0x73,0x23,0x70,0x60]
91# CHECK-INST-ALIAS: csrr t1, hgeie
92# uimm12
93# CHECK-INST: csrrs t2, hgeie, zero
94# CHECK-ENC: encoding: [0xf3,0x23,0x70,0x60]
95# CHECK-INST-ALIAS: csrr t2, hgeie
96# name
97csrrs t1, hgeie, zero
98# uimm12
99csrrs t2, 0x607, zero
100
101##################################
102# Hypervisor Trap Handling
103##################################
104
105# htval
106# name
107# CHECK-INST: csrrs t1, htval, zero
108# CHECK-ENC: encoding: [0x73,0x23,0x30,0x64]
109# CHECK-INST-ALIAS: csrr t1, htval
110# uimm12
111# CHECK-INST: csrrs t2, htval, zero
112# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x64]
113# CHECK-INST-ALIAS: csrr t2, htval
114# name
115csrrs t1, htval, zero
116# uimm12
117csrrs t2, 0x643, zero
118
119# hip
120# name
121# CHECK-INST: csrrs t1, hip, zero
122# CHECK-ENC: encoding: [0x73,0x23,0x40,0x64]
123# CHECK-INST-ALIAS: csrr t1, hip
124# uimm12
125# CHECK-INST: csrrs t2, hip, zero
126# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x64]
127# CHECK-INST-ALIAS: csrr t2, hip
128# name
129csrrs t1, hip, zero
130# uimm12
131csrrs t2, 0x644, zero
132
133# hvip
134# name
135# CHECK-INST: csrrs t1, hvip, zero
136# CHECK-ENC: encoding: [0x73,0x23,0x50,0x64]
137# CHECK-INST-ALIAS: csrr t1, hvip
138# uimm12
139# CHECK-INST: csrrs t2, hvip, zero
140# CHECK-ENC: encoding: [0xf3,0x23,0x50,0x64]
141# CHECK-INST-ALIAS: csrr t2, hvip
142# name
143csrrs t1, hvip, zero
144# uimm12
145csrrs t2, 0x645, zero
146
147# htinst
148# name
149# CHECK-INST: csrrs t1, htinst, zero
150# CHECK-ENC: encoding: [0x73,0x23,0xa0,0x64]
151# CHECK-INST-ALIAS: csrr t1, htinst
152# uimm12
153# CHECK-INST: csrrs t2, htinst, zero
154# CHECK-ENC: encoding: [0xf3,0x23,0xa0,0x64]
155# CHECK-INST-ALIAS: csrr t2, htinst
156# name
157csrrs t1, htinst, zero
158# uimm12
159csrrs t2, 0x64A, zero
160
161# hgeip
162# name
163# CHECK-INST: csrrs t1, hgeip, zero
164# CHECK-ENC: encoding: [0x73,0x23,0x20,0xe1]
165# CHECK-INST-ALIAS: csrr t1, hgeip
166# uimm12
167# CHECK-INST: csrrs t2, hgeip, zero
168# CHECK-ENC: encoding: [0xf3,0x23,0x20,0xe1]
169# CHECK-INST-ALIAS: csrr t2, hgeip
170# name
171csrrs t1, hgeip, zero
172# uimm12
173csrrs t2, 0xE12, zero
174
175##################################
176# Hypervisor Configuration
177##################################
178
179# henvcfg
180# name
181# CHECK-INST: csrrs t1, henvcfg, zero
182# CHECK-ENC: encoding: [0x73,0x23,0xa0,0x60]
183# CHECK-INST-ALIAS: csrr t1, henvcfg
184# uimm12
185# CHECK-INST: csrrs t2, henvcfg, zero
186# CHECK-ENC: encoding: [0xf3,0x23,0xa0,0x60]
187# CHECK-INST-ALIAS: csrr t2, henvcfg
188# name
189csrrs t1, henvcfg, zero
190# uimm12
191csrrs t2, 0x60A, zero
192
193########################################
194# Hypervisor Protection and Translation
195########################################
196
197# hgatp
198# name
199# CHECK-INST: csrrs t1, hgatp, zero
200# CHECK-ENC: encoding: [0x73,0x23,0x00,0x68]
201# CHECK-INST-ALIAS: csrr t1, hgatp
202# uimm12
203# CHECK-INST: csrrs t2, hgatp, zero
204# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x68]
205# CHECK-INST-ALIAS: csrr t2, hgatp
206# name
207csrrs t1, hgatp, zero
208# uimm12
209csrrs t2, 0x680, zero
210
211##########################
212# Debug/Trace Registers
213##########################
214
215# hcontext
216# name
217# CHECK-INST: csrrs t1, hcontext, zero
218# CHECK-ENC: encoding: [0x73,0x23,0x80,0x6a]
219# CHECK-INST-ALIAS: csrr t1, hcontext
220# uimm12
221# CHECK-INST: csrrs t2, hcontext, zero
222# CHECK-ENC: encoding: [0xf3,0x23,0x80,0x6a]
223# CHECK-INST-ALIAS: csrr t2, hcontext
224# name
225csrrs t1, hcontext, zero
226# uimm12
227csrrs t2, 0x6A8, zero
228
229####################################################
230# Hypervisor Counter/Timer Virtualization Registers
231####################################################
232
233# htimedelta
234# name
235# CHECK-INST: csrrs t1, htimedelta, zero
236# CHECK-ENC: encoding: [0x73,0x23,0x50,0x60]
237# CHECK-INST-ALIAS: csrr t1, htimedelta
238# uimm12
239# CHECK-INST: csrrs t2, htimedelta, zero
240# CHECK-ENC: encoding: [0xf3,0x23,0x50,0x60]
241# CHECK-INST-ALIAS: csrr t2, htimedelta
242# name
243csrrs t1, htimedelta, zero
244# uimm12
245csrrs t2, 0x605, zero
246
247################################
248# Virtual Supervisor Registers
249################################
250
251# vsstatus
252# name
253# CHECK-INST: csrrs t1, vsstatus, zero
254# CHECK-ENC: encoding: [0x73,0x23,0x00,0x20]
255# CHECK-INST-ALIAS: csrr t1, vsstatus
256# uimm12
257# CHECK-INST: csrrs t2, vsstatus, zero
258# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x20]
259# CHECK-INST-ALIAS: csrr t2, vsstatus
260# name
261csrrs t1, vsstatus, zero
262# uimm12
263csrrs t2, 0x200, zero
264
265# vsie
266# name
267# CHECK-INST: csrrs t1, vsie, zero
268# CHECK-ENC: encoding: [0x73,0x23,0x40,0x20]
269# CHECK-INST-ALIAS: csrr t1, vsie
270# uimm12
271# CHECK-INST: csrrs t2, vsie, zero
272# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x20]
273# CHECK-INST-ALIAS: csrr t2, vsie
274# name
275csrrs t1, vsie, zero
276# uimm12
277csrrs t2, 0x204, zero
278
279# vstvec
280# name
281# CHECK-INST: csrrs t1, vstvec, zero
282# CHECK-ENC: encoding: [0x73,0x23,0x50,0x20]
283# CHECK-INST-ALIAS: csrr t1, vstvec
284# uimm12
285# CHECK-INST: csrrs t2, vstvec, zero
286# CHECK-ENC: encoding: [0xf3,0x23,0x50,0x20]
287# CHECK-INST-ALIAS: csrr t2, vstvec
288# name
289csrrs t1, vstvec, zero
290# uimm12
291csrrs t2, 0x205, zero
292
293# vsscratch
294# name
295# CHECK-INST: csrrs t1, vsscratch, zero
296# CHECK-ENC: encoding: [0x73,0x23,0x00,0x24]
297# CHECK-INST-ALIAS: csrr t1, vsscratch
298# uimm12
299# CHECK-INST: csrrs t2, vsscratch, zero
300# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x24]
301# CHECK-INST-ALIAS: csrr t2, vsscratch
302# name
303csrrs t1, vsscratch, zero
304# uimm12
305csrrs t2, 0x240, zero
306
307# vsepc
308# name
309# CHECK-INST: csrrs t1, vsepc, zero
310# CHECK-ENC: encoding: [0x73,0x23,0x10,0x24]
311# CHECK-INST-ALIAS: csrr t1, vsepc
312# uimm12
313# CHECK-INST: csrrs t2, vsepc, zero
314# CHECK-ENC: encoding: [0xf3,0x23,0x10,0x24]
315# CHECK-INST-ALIAS: csrr t2, vsepc
316# name
317csrrs t1, vsepc, zero
318# uimm12
319csrrs t2, 0x241, zero
320
321# vscause
322# name
323# CHECK-INST: csrrs t1, vscause, zero
324# CHECK-ENC: encoding: [0x73,0x23,0x20,0x24]
325# CHECK-INST-ALIAS: csrr t1, vscause
326# uimm12
327# CHECK-INST: csrrs t2, vscause, zero
328# CHECK-ENC: encoding: [0xf3,0x23,0x20,0x24]
329# CHECK-INST-ALIAS: csrr t2, vscause
330# name
331csrrs t1, vscause, zero
332# uimm12
333csrrs t2, 0x242, zero
334
335# vstval
336# name
337# CHECK-INST: csrrs t1, vstval, zero
338# CHECK-ENC: encoding: [0x73,0x23,0x30,0x24]
339# CHECK-INST-ALIAS: csrr t1, vstval
340# uimm12
341# CHECK-INST: csrrs t2, vstval, zero
342# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x24]
343# CHECK-INST-ALIAS: csrr t2, vstval
344# name
345csrrs t1, vstval, zero
346# uimm12
347csrrs t2, 0x243, zero
348
349# vsip
350# name
351# CHECK-INST: csrrs t1, vsip, zero
352# CHECK-ENC: encoding: [0x73,0x23,0x40,0x24]
353# CHECK-INST-ALIAS: csrr t1, vsip
354# uimm12
355# CHECK-INST: csrrs t2, vsip, zero
356# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x24]
357# CHECK-INST-ALIAS: csrr t2, vsip
358# name
359csrrs t1, vsip, zero
360# uimm12
361csrrs t2, 0x244, zero
362
363# vstimecmp
364# name
365# CHECK-INST: csrrs t1, vstimecmp, zero
366# CHECK-ENC: encoding: [0x73,0x23,0xd0,0x24]
367# CHECK-INST-ALIAS: csrr t1, vstimecmp
368# uimm12
369# CHECK-INST: csrrs t2, vstimecmp, zero
370# CHECK-ENC: encoding: [0xf3,0x23,0xd0,0x24]
371# CHECK-INST-ALIAS: csrr t2, vstimecmp
372# name
373csrrs t1, vstimecmp, zero
374# uimm12
375csrrs t2, 0x24D, zero
376
377# vsatp
378# name
379# CHECK-INST: csrrs t1, vsatp, zero
380# CHECK-ENC: encoding: [0x73,0x23,0x00,0x28]
381# CHECK-INST-ALIAS: csrr t1, vsatp
382# uimm12
383# CHECK-INST: csrrs t2, vsatp, zero
384# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x28]
385# CHECK-INST-ALIAS: csrr t2, vsatp
386# name
387csrrs t1, vsatp, zero
388# uimm12
389csrrs t2, 0x280, zero
390
391#########################################
392# State Enable Extension (Smstateen)
393#########################################
394
395# hstateen0
396# name
397# CHECK-INST: csrrs t1, hstateen0, zero
398# CHECK-ENC: encoding: [0x73,0x23,0xc0,0x60]
399# CHECK-INST-ALIAS: csrr t1, hstateen0
400# uimm12
401# CHECK-INST: csrrs t2, hstateen0, zero
402# CHECK-ENC: encoding: [0xf3,0x23,0xc0,0x60]
403# CHECK-INST-ALIAS: csrr t2, hstateen0
404# name
405csrrs t1, hstateen0, zero
406# uimm12
407csrrs t2, 0x60C, zero
408
409# hstateen1
410# name
411# CHECK-INST: csrrs t1, hstateen1, zero
412# CHECK-ENC: encoding: [0x73,0x23,0xd0,0x60]
413# CHECK-INST-ALIAS: csrr t1, hstateen1
414# uimm12
415# CHECK-INST: csrrs t2, hstateen1, zero
416# CHECK-ENC: encoding: [0xf3,0x23,0xd0,0x60]
417# CHECK-INST-ALIAS: csrr t2, hstateen1
418# name
419csrrs t1, hstateen1, zero
420# uimm12
421csrrs t2, 0x60D, zero
422
423# hstateen2
424# name
425# CHECK-INST: csrrs t1, hstateen2, zero
426# CHECK-ENC: encoding: [0x73,0x23,0xe0,0x60]
427# CHECK-INST-ALIAS: csrr t1, hstateen2
428# uimm12
429# CHECK-INST: csrrs t2, hstateen2, zero
430# CHECK-ENC: encoding: [0xf3,0x23,0xe0,0x60]
431# CHECK-INST-ALIAS: csrr t2, hstateen2
432# name
433csrrs t1, hstateen2, zero
434# uimm12
435csrrs t2, 0x60E, zero
436
437# hstateen3
438# name
439# CHECK-INST: csrrs t1, hstateen3, zero
440# CHECK-ENC: encoding: [0x73,0x23,0xf0,0x60]
441# CHECK-INST-ALIAS: csrr t1, hstateen3
442# uimm12
443# CHECK-INST: csrrs t2, hstateen3, zero
444# CHECK-ENC: encoding: [0xf3,0x23,0xf0,0x60]
445# CHECK-INST-ALIAS: csrr t2, hstateen3
446# name
447csrrs t1, hstateen3, zero
448# uimm12
449csrrs t2, 0x60F, zero
450
451#########################################
452# Advanced Interrupt Architecture (Smaia and Ssaia)
453#########################################
454
455# hvien
456# name
457# CHECK-INST: csrrs t1, hvien, zero
458# CHECK-ENC: encoding: [0x73,0x23,0x80,0x60]
459# CHECK-INST-ALIAS: csrr t1, hvien
460# uimm12
461# CHECK-INST: csrrs t2, hvien, zero
462# CHECK-ENC: encoding: [0xf3,0x23,0x80,0x60]
463# CHECK-INST-ALIAS: csrr t2, hvien
464# name
465csrrs t1, hvien, zero
466# uimm12
467csrrs t2, 0x608, zero
468
469# hvictl
470# name
471# CHECK-INST: csrrs t1, hvictl, zero
472# CHECK-ENC: encoding: [0x73,0x23,0x90,0x60]
473# CHECK-INST-ALIAS: csrr t1, hvictl
474# uimm12
475# CHECK-INST: csrrs t2, hvictl, zero
476# CHECK-ENC: encoding: [0xf3,0x23,0x90,0x60]
477# CHECK-INST-ALIAS: csrr t2, hvictl
478# name
479csrrs t1, hvictl, zero
480# uimm12
481csrrs t2, 0x609, zero
482
483# hviprio1
484# name
485# CHECK-INST: csrrs t1, hviprio1, zero
486# CHECK-ENC: encoding: [0x73,0x23,0x60,0x64]
487# CHECK-INST-ALIAS: csrr t1, hviprio1
488# uimm12
489# CHECK-INST: csrrs t2, hviprio1, zero
490# CHECK-ENC: encoding: [0xf3,0x23,0x60,0x64]
491# CHECK-INST-ALIAS: csrr t2, hviprio1
492# name
493csrrs t1, hviprio1, zero
494# uimm12
495csrrs t2, 0x646, zero
496
497# hviprio2
498# name
499# CHECK-INST: csrrs t1, hviprio2, zero
500# CHECK-ENC: encoding: [0x73,0x23,0x70,0x64]
501# CHECK-INST-ALIAS: csrr t1, hviprio2
502# uimm12
503# CHECK-INST: csrrs t2, hviprio2, zero
504# CHECK-ENC: encoding: [0xf3,0x23,0x70,0x64]
505# CHECK-INST-ALIAS: csrr t2, hviprio2
506# name
507csrrs t1, hviprio2, zero
508# uimm12
509csrrs t2, 0x647, zero
510
511# vsiselect
512# name
513# CHECK-INST: csrrs t1, vsiselect, zero
514# CHECK-ENC: encoding: [0x73,0x23,0x00,0x25]
515# CHECK-INST-ALIAS: csrr t1, vsiselect
516# uimm12
517# CHECK-INST: csrrs t2, vsiselect, zero
518# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x25]
519# CHECK-INST-ALIAS: csrr t2, vsiselect
520# name
521csrrs t1, vsiselect, zero
522# uimm12
523csrrs t2, 0x250, zero
524
525# vsireg
526# name
527# CHECK-INST: csrrs t1, vsireg, zero
528# CHECK-ENC: encoding: [0x73,0x23,0x10,0x25]
529# CHECK-INST-ALIAS: csrr t1, vsireg
530# uimm12
531# CHECK-INST: csrrs t2, vsireg, zero
532# CHECK-ENC: encoding: [0xf3,0x23,0x10,0x25]
533# CHECK-INST-ALIAS: csrr t2, vsireg
534# name
535csrrs t1, vsireg, zero
536# uimm12
537csrrs t2, 0x251, zero
538
539# vsireg2
540# name
541# CHECK-INST: csrrs t1, vsireg2, zero
542# CHECK-ENC: encoding: [0x73,0x23,0x20,0x25]
543# CHECK-INST-ALIAS: csrr t1, vsireg2
544# uimm12
545# CHECK-INST: csrrs t2, vsireg2, zero
546# CHECK-ENC: encoding: [0xf3,0x23,0x20,0x25]
547# CHECK-INST-ALIAS: csrr t2, vsireg2
548# name
549csrrs t1, vsireg2, zero
550# uimm12
551csrrs t2, 0x252, zero
552
553# vsireg3
554# name
555# CHECK-INST: csrrs t1, vsireg3, zero
556# CHECK-ENC: encoding: [0x73,0x23,0x30,0x25]
557# CHECK-INST-ALIAS: csrr t1, vsireg3
558# uimm12
559# CHECK-INST: csrrs t2, vsireg3, zero
560# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x25]
561# CHECK-INST-ALIAS: csrr t2, vsireg3
562# name
563csrrs t1, vsireg3, zero
564# uimm12
565csrrs t2, 0x253, zero
566
567# vsireg4
568# name
569# CHECK-INST: csrrs t1, vsireg4, zero
570# CHECK-ENC: encoding: [0x73,0x23,0x50,0x25]
571# CHECK-INST-ALIAS: csrr t1, vsireg4
572# uimm12
573# CHECK-INST: csrrs t2, vsireg4, zero
574# CHECK-ENC: encoding: [0xf3,0x23,0x50,0x25]
575# CHECK-INST-ALIAS: csrr t2, vsireg4
576# name
577csrrs t1, vsireg4, zero
578# uimm12
579csrrs t2, 0x255, zero
580
581# vsireg5
582# name
583# CHECK-INST: csrrs t1, vsireg5, zero
584# CHECK-ENC: encoding: [0x73,0x23,0x60,0x25]
585# CHECK-INST-ALIAS: csrr t1, vsireg5
586# uimm12
587# CHECK-INST: csrrs t2, vsireg5, zero
588# CHECK-ENC: encoding: [0xf3,0x23,0x60,0x25]
589# CHECK-INST-ALIAS: csrr t2, vsireg5
590# name
591csrrs t1, vsireg5, zero
592# uimm12
593csrrs t2, 0x256, zero
594
595# vsireg6
596# name
597# CHECK-INST: csrrs t1, vsireg6, zero
598# CHECK-ENC: encoding: [0x73,0x23,0x70,0x25]
599# CHECK-INST-ALIAS: csrr t1, vsireg6
600# uimm12
601# CHECK-INST: csrrs t2, vsireg6, zero
602# CHECK-ENC: encoding: [0xf3,0x23,0x70,0x25]
603# CHECK-INST-ALIAS: csrr t2, vsireg6
604# name
605csrrs t1, vsireg6, zero
606# uimm12
607csrrs t2, 0x257, zero
608
609# vstopei
610# name
611# CHECK-INST: csrrs t1, vstopei, zero
612# CHECK-ENC: encoding: [0x73,0x23,0xc0,0x25]
613# CHECK-INST-ALIAS: csrr t1, vstopei
614# uimm12
615# CHECK-INST: csrrs t2, vstopei, zero
616# CHECK-ENC: encoding: [0xf3,0x23,0xc0,0x25]
617# CHECK-INST-ALIAS: csrr t2, vstopei
618# name
619csrrs t1, vstopei, zero
620# uimm12
621csrrs t2, 0x25C, zero
622
623# vstopi
624# name
625# CHECK-INST: csrrs t1, vstopi, zero
626# CHECK-ENC: encoding: [0x73,0x23,0x00,0xeb]
627# CHECK-INST-ALIAS: csrr t1, vstopi
628# uimm12
629# CHECK-INST: csrrs t2, vstopi, zero
630# CHECK-ENC: encoding: [0xf3,0x23,0x00,0xeb]
631# CHECK-INST-ALIAS: csrr t2, vstopi
632# name
633csrrs t1, vstopi, zero
634# uimm12
635csrrs t2, 0xEB0, zero
636
637##################################
638# Control Transfer Records
639##################################
640
641# vsctrctl
642# name
643# CHECK-INST: csrrs t1, vsctrctl, zero
644# CHECK-ENC: encoding: [0x73,0x23,0xe0,0x24]
645# CHECK-INST-ALIAS: csrr t1, vsctrctl
646# uimm12
647# CHECK-INST: csrrs t2, vsctrctl, zero
648# CHECK-ENC: encoding: [0xf3,0x23,0xe0,0x24]
649# CHECK-INST-ALIAS: csrr t2, vsctrctl
650csrrs t1, vsctrctl, zero
651# uimm12
652csrrs t2, 0x24E, zero
653