xref: /llvm-project/llvm/test/MC/RISCV/corev/XCVbi.s (revision c532ba4edd7ad7675ba450ba43268aa9e7bda46b)
1# RUN: llvm-mc -triple=riscv32 --mattr=+xcvbi -show-encoding %s \
2# RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INSTR
3# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+xcvbi < %s \
4# RUN:     | llvm-objdump --mattr=+xcvbi -M no-aliases -d -r - \
5# RUN:     | FileCheck --check-prefix=CHECK-OBJDUMP %s
6# RUN: not llvm-mc -triple riscv32 %s 2>&1 \
7# RUN:     | FileCheck -check-prefix=CHECK-NO-EXT %s
8
9//===----------------------------------------------------------------------===//
10// cv.beqimm
11//===----------------------------------------------------------------------===//
12
13label1:
14
15cv.beqimm t0, 0, 0
16# CHECK-INSTR: cv.beqimm t0, 0, 0
17# CHECK-OBJDUMP: cv.beqimm t0, 0x0, 0x0 <label1>
18# CHECK-ENCODING: [0x0b,0xe0,0x02,0x00]
19# CHECK-NO-EXT: instruction requires the following: 'XCVbi' (CORE-V Immediate Branching){{$}}
20
21cv.beqimm a0, 5, 42
22# CHECK-INSTR: cv.beqimm a0, 5, 42
23# CHECK-OBJDUMP: cv.beqimm a0, 0x5, 0x2e <label2+0x22>
24# CHECK-ENCODING: [0x0b,0x65,0x55,0x02]
25# CHECK-NO-EXT: instruction requires the following: 'XCVbi' (CORE-V Immediate Branching){{$}}
26
27cv.beqimm a0, -5, label1
28# CHECK-INSTR: cv.beqimm a0, -5, label1
29# CHECK-OBJDUMP: cv.beqimm a0, -0x5, 0x0 <label1>
30# CHECK-ENCODING: [0x0b'A',0x60'A',0xb5'A',0x01'A']
31# CHECK-ENCODING: fixup A - offset: 0, value: label1, kind: fixup_riscv_branch
32# CHECK-NO-EXT: instruction requires the following: 'XCVbi' (CORE-V Immediate Branching){{$}}
33
34//===----------------------------------------------------------------------===//
35// cv.bneimm
36//===----------------------------------------------------------------------===//
37
38label2:
39
40cv.bneimm t0, 0, 0
41# CHECK-INSTR: cv.bneimm t0, 0, 0
42# CHECK-OBJDUMP: cv.bneimm t0, 0x0, 0xc <label2>
43# CHECK-ENCODING: [0x0b,0xf0,0x02,0x00]
44# CHECK-NO-EXT: instruction requires the following: 'XCVbi' (CORE-V Immediate Branching){{$}}
45
46cv.bneimm a0, 5, 42
47# CHECK-INSTR: cv.bneimm a0, 5, 42
48# CHECK-OBJDUMP: cv.bneimm a0, 0x5, 0x3a <label2+0x2e>
49# CHECK-ENCODING: [0x0b,0x75,0x55,0x02]
50# CHECK-NO-EXT: instruction requires the following: 'XCVbi' (CORE-V Immediate Branching){{$}}
51
52cv.bneimm a0, -5, label2
53# CHECK-INSTR: cv.bneimm a0, -5, label2
54# CHECK-OBJDUMP: cv.bneimm a0, -0x5, 0xc <label2>
55# CHECK-ENCODING: [0x0b'A',0x70'A',0xb5'A',0x01'A']
56# CHECK-ENCODING: fixup A - offset: 0, value: label2, kind: fixup_riscv_branch
57# CHECK-NO-EXT: instruction requires the following: 'XCVbi' (CORE-V Immediate Branching){{$}}
58