xref: /llvm-project/llvm/test/MC/Hexagon/system-inst.s (revision bd91cf8d83a9c352a02ea1b66095ef53362e027c)
1# RUN: llvm-mc -triple=hexagon --mcpu=hexagonv65 -filetype=obj %s | \
2# RUN:     llvm-objdump --mcpu=hexagonv65 -d - | FileCheck %s
3# This checks correct encoding of system and cache instructions.
4
5#CHECK: a800c000 { barrier }
6barrier
7
8#CHECK: a200c000 { dckill }
9dckill
10
11#CHECK: a820c000 { l2kill }
12l2kill
13
14#CHECK: a840c000 { syncht }
15syncht
16
17#CHECK: a00ac000 { dccleana(r10) }
18dccleana(r10)
19
20#CHECK: a02bc000 { dcinva(r11) }
21dcinva(r11)
22
23#CHECK: a04cc000 { dccleaninva(r12) }
24dccleaninva(r12)
25
26#CHECK: a22dc000 { dccleanidx(r13) }
27dccleanidx(r13)
28
29#CHECK: a410d100 { dctagw(r16,r17) }
30dctagw(r16,r17)
31
32#CHECK: a24ec000 { dcinvidx(r14) }
33dcinvidx(r14)
34
35#CHECK: a26fc000 { dccleaninvidx(r15) }
36dccleaninvidx(r15)
37
38#CHECK: a433c012 { r18 = dctagr(r19) }
39r18=dctagr(r19)
40
41#CHECK: a454d500 { l2tagw(r20,r21) }
42l2tagw(r20,r21)
43
44#CHECK: a477c016 { r22 = l2tagr(r23) }
45r22=l2tagr(r23)
46
47#CHECK: a618d900 { l2fetch(r24,r25) }
48l2fetch(r24,r25)
49
50#CHECK: a87ac000 { l2cleaninvidx(r26) }
51l2cleaninvidx(r26)
52
53#CHECK: 6401c000 { swi(r1) }
54swi(r1)
55
56#CHECK: 6402c020 { cswi(r2) }
57cswi(r2)
58
59#CHECK: 6403c040 { iassignw(r3) }
60iassignw(r3)
61
62#CHECK: 6404c060 { ciad(r4) }
63ciad(r4)
64
65#CHECK: 6445c000 { wait(r5) }
66wait(r5)
67
68#CHECK: 6446c020 { resume(r6) }
69resume(r6)
70
71#CHECK: 6467c000 { stop(r7) }
72stop(r7)
73
74#CHECK: 6468c020 { start(r8) }
75start(r8)
76
77#CHECK: 6469c040 { nmi(r9) }
78nmi(r9)
79
80#CHECK: 648ac060 { siad(r10) }
81siad(r10)
82
83#CHECK: 648bc300 { setimask(p3,r11) }
84setimask(p3,r11)
85
86#CHECK: 650cc000 { crswap(r12,sgp0) }
87crswap(r12,sgp0)
88
89#CHECK: 652dc000 { crswap(r13,sgp1) }
90crswap(r13,sgp1)
91
92#CHECK: 660fc00e { r14 = getimask(r15) }
93r14=getimask(r15)
94
95#CHECK: 6671c010 { r16 = iassignr(r17) }
96r16=iassignr(r17)
97
98#CHECK: 6700c006 { ssr = r0 }
99ssr=r0
100
101#CHECK: 6c0cc300 { tlbw(r13:12,r3) }
102tlbw(r13:12,r3)
103
104#CHECK: 6c20c000 { brkpt }
105brkpt
106
107#CHECK: 6c20c020 { tlblock }
108tlblock
109
110#CHECK: 6c20c040 { tlbunlock }
111tlbunlock
112
113#CHECK: 6c20c060 { k0lock }
114k0lock
115
116#CHECK: 6c20c080 { k0unlock }
117k0unlock
118
119#CHECK: 6c44c002 { r3:2 = tlbr(r4) }
120r3:2=tlbr(R4)
121
122#CHECK: 6c86c005 { r5 = tlbp(r6) }
123r5=tlbp(r6)
124
125#CHECK: 6d0ac03e { s63:62 = r11:10 }
126s63:62=r11:10
127
128#CHECK: 6e86c000 { r0 = ssr }
129r0=ssr
130
131#CHECK: 6f3ec000 { r1:0 = s63:62 }
132r1:0=s63:62
133
134#CHECK: 6a49c01f   r31 = add(pc,##0x400000) }
135r31=add (pc,#0x400000)
136
137#CHECK: 6a49c21f { r31 = add(pc,#0x4) }
138r31=add (pc,#0x4)
139
140#CHECK: 625fc000 { trace(r31) }
141trace(r31)
142
143#CHECK: 6ce6c00b { r11 = tlboc(r7:6) }
144r11=tlboc(r7:6)
145
146#CHECK: 6cbcc000 { tlbinvasid(r28) }
147tlbinvasid(r28)
148
149#CHECK: a656c000 { l2invidx(r22) }
150l2invidx(r22)
151
152#CHECK: a693c000 { l2fetch(r19,r1:0) }
153l2fetch(r19,r1:0)
154
155#CHECK: a634c000 { l2cleanidx(r20) }
156l2cleanidx(r20)
157
158#CHECK: 6cc6c60c { r12 = ctlbw(r7:6,r6) }
159r12=ctlbw(r7:6,r6)
160
161#CHECK: a618cd00 { l2fetch(r24,r13) }
162l2fetch(r24,r13)
163
164# SWI isSoloAX not isSolo
165#CHECK-NOT: error:
166{
167  r0 = r0
168  swi(r1)
169}
170