xref: /llvm-project/llvm/test/MC/Hexagon/multiple-pc4.s (revision 252c42354eca54274ed7b10c32c73c6937478e8b) 
1# RUN: llvm-mc -triple=hexagon -filetype=asm %s 2>%t; FileCheck --implicit-check-not=error: %s <%t
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3# Check that multiple changes to a predicate in a packet are caught.
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5	{ p0 = cmp.eq (r0, r0); p3:0 = r0 }
6# CHECK: rror: register {{.+}} modified more than once
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8	{ p0 = cmp.eq (r0, r0); c4 = r0 }
9# CHECK: rror: register {{.+}} modified more than once
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11	p3:0 = r9
12# CHECK-NOT: rror: register {{.+}} modified more than once
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14# Multiple writes to the same predicate register are permitted:
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16	{ p0 = cmp.eq (r0, r0); p0 = and(p1, p2) }
17# CHECK-NOT: rror: register {{.+}} modified more than once
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