xref: /llvm-project/llvm/test/MC/ELF/RISCV/gen-dwarf.s (revision bf67610a8ac07ec143f243f129eecd456aa63383)
1## Linker relaxation imposes restrictions on .eh_frame/.debug_frame, .debug_line,
2## and LEB128 uses.
3
4## CFI instructions can be preceded by relaxable instructions. We must use
5## DW_CFA_advance_loc* opcodes with relocations.
6
7## For .debug_line, emit DW_LNS_fixed_advance_pc with ADD16/SUB16 relocations so
8## that .debug_line can be fixed by the linker. Without linker relaxation, we can
9## emit special opcodes to make .debug_line smaller, but we don't do this for
10## consistency.
11
12# RUN: llvm-mc -filetype=obj -triple=riscv64 -g -dwarf-version=5 -mattr=+relax < %s -o %t
13# RUN: llvm-dwarfdump -eh-frame -debug-line -debug-rnglists -v %t | FileCheck %s
14# RUN: llvm-readobj -r -x .eh_frame %t | FileCheck %s --check-prefix=RELOC
15
16# CHECK:      FDE
17# CHECK-NEXT: Format:       DWARF32
18# CHECK-NEXT: DW_CFA_advance_loc: 16
19# CHECK-NEXT: DW_CFA_def_cfa_offset: +32
20# CHECK-NEXT: DW_CFA_advance_loc: 4
21# CHECK-NEXT: DW_CFA_offset: X1 -8
22# CHECK-NEXT: DW_CFA_nop:
23
24# CHECK:      DW_LNE_set_address
25# CHECK-NEXT: DW_LNS_advance_line ([[#]])
26# CHECK-NEXT: DW_LNS_copy
27# CHECK-NEXT:                           is_stmt
28# CHECK-NEXT: DW_LNS_advance_line
29# CHECK-NEXT: DW_LNS_fixed_advance_pc (addr += 0x0004, op-index = 0)
30# CHECK-NEXT: DW_LNS_copy
31# CHECK-NEXT:                           is_stmt
32# CHECK-NEXT: DW_LNS_advance_line
33# CHECK-NEXT: DW_LNS_fixed_advance_pc (addr += 0x0004, op-index = 0)
34# CHECK-NEXT: DW_LNS_copy
35
36# CHECK:      0x00000000: range list header: length = 0x0000001d, format = DWARF32, version = 0x0005
37# CHECK-NEXT: ranges:
38# CHECK-NEXT: 0x0000000c: [DW_RLE_start_length]:  0x0000000000000000, 0x0000000000000034
39# CHECK-NEXT: 0x00000016: [DW_RLE_start_length]:  0x0000000000000000, 0x0000000000000004
40# CHECK-NEXT: 0x00000020: [DW_RLE_end_of_list ]
41
42# RELOC:      Section ([[#]]) .rela.eh_frame {
43# RELOC-NEXT:   0x1C R_RISCV_32_PCREL .L0  0x0
44# RELOC-NEXT:   0x20 R_RISCV_ADD32 .L0  0x0
45# RELOC-NEXT:   0x20 R_RISCV_SUB32 .L0  0x0
46# RELOC-NEXT:   0x25 R_RISCV_SET6 .L0  0x0
47# RELOC-NEXT:   0x25 R_RISCV_SUB6 .L0  0x0
48# RELOC-NEXT:   0x34 R_RISCV_32_PCREL .L0  0x0
49# RELOC-NEXT: }
50
51# RELOC:      Section ([[#]]) .rela.debug_rnglists {
52# RELOC-NEXT:   0xD R_RISCV_64 .text.foo 0x0
53# RELOC-NEXT:   0x15 R_RISCV_SET_ULEB128 .L0  0x0
54# RELOC-NEXT:   0x15 R_RISCV_SUB_ULEB128 .text.foo 0x0
55# RELOC-NEXT:   0x17 R_RISCV_64 .text.bar 0x0
56# RELOC-NEXT: }
57
58# RELOC:      Section ([[#]]) .rela.debug_line {
59# RELOC:        R_RISCV_ADD16 .L0  0x0
60# RELOC-NEXT:   R_RISCV_SUB16 .L0  0x0
61# RELOC-NEXT:   R_RISCV_ADD16 .L0  0x0
62# RELOC-NEXT:   R_RISCV_SUB16 .L0  0x0
63# RELOC-NEXT:   R_RISCV_ADD16 .L0  0x0
64# RELOC-NEXT:   R_RISCV_SUB16 .L0  0x0
65# RELOC:      }
66
67# RELOC:      Hex dump of section '.eh_frame':
68# RELOC-NEXT: 0x00000000
69# RELOC-NEXT: 0x00000010
70# RELOC-NEXT: 0x00000020
71# RELOC-NEXT: 0x00000030 30000000 00000000 04000000 00000000
72#                                          ^ address_range
73
74.section .text.foo,"ax"
75.globl foo
76foo:
77.cfi_startproc
78.Lpcrel_hi0:
79  auipc a1, %pcrel_hi(g)
80  lw a1, %pcrel_lo(.Lpcrel_hi0)(a1)
81  bge a1, a0, .LBB0_2
82  addi sp, sp, -32
83  .cfi_def_cfa_offset 32
84  sd ra, 24(sp)
85  .cfi_offset ra, -8
86  addi a0, sp, 8
87  call ext@plt
88  ld ra, 24(sp)
89  addi sp, sp, 32
90  ret
91.LBB0_2:
92  li a0, 0
93  ret
94  .cfi_endproc
95  .size foo, .-foo
96
97.section .text.bar,"ax"
98bar:
99.cfi_startproc
100  nop
101.cfi_endproc
102