xref: /llvm-project/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt (revision 7b766a6f505577bbb7d2cd2c553b6207306c0df9)
1# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
2# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
3
4## add
5
6# ATT:   {evex}	addb	%r17b, %r16b
7# INTEL: {evex}	add	r16b, r17b
80x62,0xec,0x7c,0x08,0x02,0xc1
9
10# ATT:   {evex}	addw	%r17w, %r16w
11# INTEL: {evex}	add	r16w, r17w
120x62,0xec,0x7d,0x08,0x03,0xc1
13
14# ATT:   {evex}	addl	%r17d, %r16d
15# INTEL: {evex}	add	r16d, r17d
160x62,0xec,0x7c,0x08,0x03,0xc1
17
18# ATT:   {evex}	addq	%r17, %r16
19# INTEL: {evex}	add	r16, r17
200x62,0xec,0xfc,0x08,0x03,0xc1
21
22# ATT:   addb	%r17b, %r16b, %r18b
23# INTEL: add	r18b, r16b, r17b
240x62,0xec,0x6c,0x10,0x02,0xc1
25
26# ATT:   addw	%r17w, %r16w, %r18w
27# INTEL: add	r18w, r16w, r17w
280x62,0xec,0x6d,0x10,0x03,0xc1
29
30# ATT:   addl	%r17d, %r16d, %r18d
31# INTEL: add	r18d, r16d, r17d
320x62,0xec,0x6c,0x10,0x03,0xc1
33
34# ATT:   addq	%r17, %r16, %r18
35# INTEL: add	r18, r16, r17
360x62,0xec,0xec,0x10,0x03,0xc1
37
38# ATT:   {nf}	addb	%r17b, %r16b
39# INTEL: {nf}	add	r16b, r17b
400x62,0xec,0x7c,0x0c,0x02,0xc1
41
42# ATT:   {nf}	addw	%r17w, %r16w
43# INTEL: {nf}	add	r16w, r17w
440x62,0xec,0x7d,0x0c,0x03,0xc1
45
46# ATT:   {nf}	addl	%r17d, %r16d
47# INTEL: {nf}	add	r16d, r17d
480x62,0xec,0x7c,0x0c,0x03,0xc1
49
50# ATT:   {nf}	addq	%r17, %r16
51# INTEL: {nf}	add	r16, r17
520x62,0xec,0xfc,0x0c,0x03,0xc1
53
54# ATT:   {nf}	addb	%r17b, %r16b, %r18b
55# INTEL: {nf}	add	r18b, r16b, r17b
560x62,0xec,0x6c,0x14,0x02,0xc1
57
58# ATT:   {nf}	addw	%r17w, %r16w, %r18w
59# INTEL: {nf}	add	r18w, r16w, r17w
600x62,0xec,0x6d,0x14,0x03,0xc1
61
62# ATT:   {nf}	addl	%r17d, %r16d, %r18d
63# INTEL: {nf}	add	r18d, r16d, r17d
640x62,0xec,0x6c,0x14,0x03,0xc1
65
66# ATT:   {nf}	addq	%r17, %r16, %r18
67# INTEL: {nf}	add	r18, r16, r17
680x62,0xec,0xec,0x14,0x03,0xc1
69
70## sub
71
72# ATT:   {evex}	subb	%r17b, %r16b
73# INTEL: {evex}	sub	r16b, r17b
740x62,0xec,0x7c,0x08,0x2a,0xc1
75
76# ATT:   {evex}	subw	%r17w, %r16w
77# INTEL: {evex}	sub	r16w, r17w
780x62,0xec,0x7d,0x08,0x2b,0xc1
79
80# ATT:   {evex}	subl	%r17d, %r16d
81# INTEL: {evex}	sub	r16d, r17d
820x62,0xec,0x7c,0x08,0x2b,0xc1
83
84# ATT:   {evex}	subq	%r17, %r16
85# INTEL: {evex}	sub	r16, r17
860x62,0xec,0xfc,0x08,0x2b,0xc1
87
88# ATT:   subb	%r17b, %r16b, %r18b
89# INTEL: sub	r18b, r16b, r17b
900x62,0xec,0x6c,0x10,0x2a,0xc1
91
92# ATT:   subw	%r17w, %r16w, %r18w
93# INTEL: sub	r18w, r16w, r17w
940x62,0xec,0x6d,0x10,0x2b,0xc1
95
96# ATT:   subl	%r17d, %r16d, %r18d
97# INTEL: sub	r18d, r16d, r17d
980x62,0xec,0x6c,0x10,0x2b,0xc1
99
100# ATT:   subq	%r17, %r16, %r18
101# INTEL: sub	r18, r16, r17
1020x62,0xec,0xec,0x10,0x2b,0xc1
103
104# ATT:   {nf}	subb	%r17b, %r16b
105# INTEL: {nf}	sub	r16b, r17b
1060x62,0xec,0x7c,0x0c,0x2a,0xc1
107
108# ATT:   {nf}	subw	%r17w, %r16w
109# INTEL: {nf}	sub	r16w, r17w
1100x62,0xec,0x7d,0x0c,0x2b,0xc1
111
112# ATT:   {nf}	subl	%r17d, %r16d
113# INTEL: {nf}	sub	r16d, r17d
1140x62,0xec,0x7c,0x0c,0x2b,0xc1
115
116# ATT:   {nf}	subq	%r17, %r16
117# INTEL: {nf}	sub	r16, r17
1180x62,0xec,0xfc,0x0c,0x2b,0xc1
119
120# ATT:   {nf}	subb	%r17b, %r16b, %r18b
121# INTEL: {nf}	sub	r18b, r16b, r17b
1220x62,0xec,0x6c,0x14,0x2a,0xc1
123
124# ATT:   {nf}	subw	%r17w, %r16w, %r18w
125# INTEL: {nf}	sub	r18w, r16w, r17w
1260x62,0xec,0x6d,0x14,0x2b,0xc1
127
128# ATT:   {nf}	subl	%r17d, %r16d, %r18d
129# INTEL: {nf}	sub	r18d, r16d, r17d
1300x62,0xec,0x6c,0x14,0x2b,0xc1
131
132# ATT:   {nf}	subq	%r17, %r16, %r18
133# INTEL: {nf}	sub	r18, r16, r17
1340x62,0xec,0xec,0x14,0x2b,0xc1
135
136## and
137
138# ATT:   {evex}	andb	%r17b, %r16b
139# INTEL: {evex}	and	r16b, r17b
1400x62,0xec,0x7c,0x08,0x22,0xc1
141
142# ATT:   {evex}	andw	%r17w, %r16w
143# INTEL: {evex}	and	r16w, r17w
1440x62,0xec,0x7d,0x08,0x23,0xc1
145
146# ATT:   {evex}	andl	%r17d, %r16d
147# INTEL: {evex}	and	r16d, r17d
1480x62,0xec,0x7c,0x08,0x23,0xc1
149
150# ATT:   {evex}	andq	%r17, %r16
151# INTEL: {evex}	and	r16, r17
1520x62,0xec,0xfc,0x08,0x23,0xc1
153
154# ATT:   andb	%r17b, %r16b, %r18b
155# INTEL: and	r18b, r16b, r17b
1560x62,0xec,0x6c,0x10,0x22,0xc1
157
158# ATT:   andw	%r17w, %r16w, %r18w
159# INTEL: and	r18w, r16w, r17w
1600x62,0xec,0x6d,0x10,0x23,0xc1
161
162# ATT:   andl	%r17d, %r16d, %r18d
163# INTEL: and	r18d, r16d, r17d
1640x62,0xec,0x6c,0x10,0x23,0xc1
165
166# ATT:   andq	%r17, %r16, %r18
167# INTEL: and	r18, r16, r17
1680x62,0xec,0xec,0x10,0x23,0xc1
169
170# ATT:   {nf}	andb	%r17b, %r16b
171# INTEL: {nf}	and	r16b, r17b
1720x62,0xec,0x7c,0x0c,0x22,0xc1
173
174# ATT:   {nf}	andw	%r17w, %r16w
175# INTEL: {nf}	and	r16w, r17w
1760x62,0xec,0x7d,0x0c,0x23,0xc1
177
178# ATT:   {nf}	andl	%r17d, %r16d
179# INTEL: {nf}	and	r16d, r17d
1800x62,0xec,0x7c,0x0c,0x23,0xc1
181
182# ATT:   {nf}	andq	%r17, %r16
183# INTEL: {nf}	and	r16, r17
1840x62,0xec,0xfc,0x0c,0x23,0xc1
185
186# ATT:   {nf}	andb	%r17b, %r16b, %r18b
187# INTEL: {nf}	and	r18b, r16b, r17b
1880x62,0xec,0x6c,0x14,0x22,0xc1
189
190# ATT:   {nf}	andw	%r17w, %r16w, %r18w
191# INTEL: {nf}	and	r18w, r16w, r17w
1920x62,0xec,0x6d,0x14,0x23,0xc1
193
194# ATT:   {nf}	andl	%r17d, %r16d, %r18d
195# INTEL: {nf}	and	r18d, r16d, r17d
1960x62,0xec,0x6c,0x14,0x23,0xc1
197
198# ATT:   {nf}	andq	%r17, %r16, %r18
199# INTEL: {nf}	and	r18, r16, r17
2000x62,0xec,0xec,0x14,0x23,0xc1
201
202## or
203
204# ATT:   {evex}	orb	%r17b, %r16b
205# INTEL: {evex}	or	r16b, r17b
2060x62,0xec,0x7c,0x08,0x0a,0xc1
207
208# ATT:   {evex}	orw	%r17w, %r16w
209# INTEL: {evex}	or	r16w, r17w
2100x62,0xec,0x7d,0x08,0x0b,0xc1
211
212# ATT:   {evex}	orl	%r17d, %r16d
213# INTEL: {evex}	or	r16d, r17d
2140x62,0xec,0x7c,0x08,0x0b,0xc1
215
216# ATT:   {evex}	orq	%r17, %r16
217# INTEL: {evex}	or	r16, r17
2180x62,0xec,0xfc,0x08,0x0b,0xc1
219
220# ATT:   orb	%r17b, %r16b, %r18b
221# INTEL: or	r18b, r16b, r17b
2220x62,0xec,0x6c,0x10,0x0a,0xc1
223
224# ATT:   orw	%r17w, %r16w, %r18w
225# INTEL: or	r18w, r16w, r17w
2260x62,0xec,0x6d,0x10,0x0b,0xc1
227
228# ATT:   orl	%r17d, %r16d, %r18d
229# INTEL: or	r18d, r16d, r17d
2300x62,0xec,0x6c,0x10,0x0b,0xc1
231
232# ATT:   orq	%r17, %r16, %r18
233# INTEL: or	r18, r16, r17
2340x62,0xec,0xec,0x10,0x0b,0xc1
235
236# ATT:   {nf}	orb	%r17b, %r16b
237# INTEL: {nf}	or	r16b, r17b
2380x62,0xec,0x7c,0x0c,0x0a,0xc1
239
240# ATT:   {nf}	orw	%r17w, %r16w
241# INTEL: {nf}	or	r16w, r17w
2420x62,0xec,0x7d,0x0c,0x0b,0xc1
243
244# ATT:   {nf}	orl	%r17d, %r16d
245# INTEL: {nf}	or	r16d, r17d
2460x62,0xec,0x7c,0x0c,0x0b,0xc1
247
248# ATT:   {nf}	orq	%r17, %r16
249# INTEL: {nf}	or	r16, r17
2500x62,0xec,0xfc,0x0c,0x0b,0xc1
251
252# ATT:   {nf}	orb	%r17b, %r16b, %r18b
253# INTEL: {nf}	or	r18b, r16b, r17b
2540x62,0xec,0x6c,0x14,0x0a,0xc1
255
256# ATT:   {nf}	orw	%r17w, %r16w, %r18w
257# INTEL: {nf}	or	r18w, r16w, r17w
2580x62,0xec,0x6d,0x14,0x0b,0xc1
259
260# ATT:   {nf}	orl	%r17d, %r16d, %r18d
261# INTEL: {nf}	or	r18d, r16d, r17d
2620x62,0xec,0x6c,0x14,0x0b,0xc1
263
264# ATT:   {nf}	orq	%r17, %r16, %r18
265# INTEL: {nf}	or	r18, r16, r17
2660x62,0xec,0xec,0x14,0x0b,0xc1
267
268## xor
269
270# ATT:   {evex}	xorb	%r17b, %r16b
271# INTEL: {evex}	xor	r16b, r17b
2720x62,0xec,0x7c,0x08,0x32,0xc1
273
274# ATT:   {evex}	xorw	%r17w, %r16w
275# INTEL: {evex}	xor	r16w, r17w
2760x62,0xec,0x7d,0x08,0x33,0xc1
277
278# ATT:   {evex}	xorl	%r17d, %r16d
279# INTEL: {evex}	xor	r16d, r17d
2800x62,0xec,0x7c,0x08,0x33,0xc1
281
282# ATT:   {evex}	xorq	%r17, %r16
283# INTEL: {evex}	xor	r16, r17
2840x62,0xec,0xfc,0x08,0x33,0xc1
285
286# ATT:   xorb	%r17b, %r16b, %r18b
287# INTEL: xor	r18b, r16b, r17b
2880x62,0xec,0x6c,0x10,0x32,0xc1
289
290# ATT:   xorw	%r17w, %r16w, %r18w
291# INTEL: xor	r18w, r16w, r17w
2920x62,0xec,0x6d,0x10,0x33,0xc1
293
294# ATT:   xorl	%r17d, %r16d, %r18d
295# INTEL: xor	r18d, r16d, r17d
2960x62,0xec,0x6c,0x10,0x33,0xc1
297
298# ATT:   xorq	%r17, %r16, %r18
299# INTEL: xor	r18, r16, r17
3000x62,0xec,0xec,0x10,0x33,0xc1
301
302# ATT:   {nf}	xorb	%r17b, %r16b
303# INTEL: {nf}	xor	r16b, r17b
3040x62,0xec,0x7c,0x0c,0x32,0xc1
305
306# ATT:   {nf}	xorw	%r17w, %r16w
307# INTEL: {nf}	xor	r16w, r17w
3080x62,0xec,0x7d,0x0c,0x33,0xc1
309
310# ATT:   {nf}	xorl	%r17d, %r16d
311# INTEL: {nf}	xor	r16d, r17d
3120x62,0xec,0x7c,0x0c,0x33,0xc1
313
314# ATT:   {nf}	xorq	%r17, %r16
315# INTEL: {nf}	xor	r16, r17
3160x62,0xec,0xfc,0x0c,0x33,0xc1
317
318# ATT:   {nf}	xorb	%r17b, %r16b, %r18b
319# INTEL: {nf}	xor	r18b, r16b, r17b
3200x62,0xec,0x6c,0x14,0x32,0xc1
321
322# ATT:   {nf}	xorw	%r17w, %r16w, %r18w
323# INTEL: {nf}	xor	r18w, r16w, r17w
3240x62,0xec,0x6d,0x14,0x33,0xc1
325
326# ATT:   {nf}	xorl	%r17d, %r16d, %r18d
327# INTEL: {nf}	xor	r18d, r16d, r17d
3280x62,0xec,0x6c,0x14,0x33,0xc1
329
330# ATT:   {nf}	xorq	%r17, %r16, %r18
331# INTEL: {nf}	xor	r18, r16, r17
3320x62,0xec,0xec,0x14,0x33,0xc1
333
334## adc
335
336# ATT:   {evex}	adcb	%r17b, %r16b
337# INTEL: {evex}	adc	r16b, r17b
3380x62,0xec,0x7c,0x08,0x12,0xc1
339
340# ATT:   {evex}	adcw	%r17w, %r16w
341# INTEL: {evex}	adc	r16w, r17w
3420x62,0xec,0x7d,0x08,0x13,0xc1
343
344# ATT:   {evex}	adcl	%r17d, %r16d
345# INTEL: {evex}	adc	r16d, r17d
3460x62,0xec,0x7c,0x08,0x13,0xc1
347
348# ATT:   {evex}	adcq	%r17, %r16
349# INTEL: {evex}	adc	r16, r17
3500x62,0xec,0xfc,0x08,0x13,0xc1
351
352# ATT:   adcb	%r17b, %r16b, %r18b
353# INTEL: adc	r18b, r16b, r17b
3540x62,0xec,0x6c,0x10,0x12,0xc1
355
356# ATT:   adcw	%r17w, %r16w, %r18w
357# INTEL: adc	r18w, r16w, r17w
3580x62,0xec,0x6d,0x10,0x13,0xc1
359
360# ATT:   adcl	%r17d, %r16d, %r18d
361# INTEL: adc	r18d, r16d, r17d
3620x62,0xec,0x6c,0x10,0x13,0xc1
363
364# ATT:   adcq	%r17, %r16, %r18
365# INTEL: adc	r18, r16, r17
3660x62,0xec,0xec,0x10,0x13,0xc1
367
368## sbb
369
370# ATT:   {evex}	sbbb	%r17b, %r16b
371# INTEL: {evex}	sbb	r16b, r17b
3720x62,0xec,0x7c,0x08,0x1a,0xc1
373
374# ATT:   {evex}	sbbw	%r17w, %r16w
375# INTEL: {evex}	sbb	r16w, r17w
3760x62,0xec,0x7d,0x08,0x1b,0xc1
377
378# ATT:   {evex}	sbbl	%r17d, %r16d
379# INTEL: {evex}	sbb	r16d, r17d
3800x62,0xec,0x7c,0x08,0x1b,0xc1
381
382# ATT:   {evex}	sbbq	%r17, %r16
383# INTEL: {evex}	sbb	r16, r17
3840x62,0xec,0xfc,0x08,0x1b,0xc1
385
386# ATT:   sbbb	%r17b, %r16b, %r18b
387# INTEL: sbb	r18b, r16b, r17b
3880x62,0xec,0x6c,0x10,0x1a,0xc1
389
390# ATT:   sbbw	%r17w, %r16w, %r18w
391# INTEL: sbb	r18w, r16w, r17w
3920x62,0xec,0x6d,0x10,0x1b,0xc1
393
394# ATT:   sbbl	%r17d, %r16d, %r18d
395# INTEL: sbb	r18d, r16d, r17d
3960x62,0xec,0x6c,0x10,0x1b,0xc1
397
398# ATT:   sbbq	%r17, %r16, %r18
399# INTEL: sbb	r18, r16, r17
4000x62,0xec,0xec,0x10,0x1b,0xc1
401
402## movbe
403
404# ATT:   movbew	 %r16w, %r17w
405# INTEL: movbe	r17w, r16w
4060x62,0xec,0x7d,0x08,0x60,0xc8
407
408# ATT:   movbel	 %r16d, %r17d
409# INTEL: movbe	r17d, r16d
4100x62,0xec,0x7c,0x08,0x60,0xc8
411
412# ATT:   movbeq	 %r16, %r17
413# INTEL: movbe	r17, r16
4140x62,0xec,0xfc,0x08,0x60,0xc8
415
416## ccmp
417
418# ATT:   ccmpob {dfv=}	%r16b, %r17b
419# INTEL: ccmpo {dfv=}	r17b, r16b
4200x62,0xec,0x04,0x00,0x3a,0xc8
421
422# ATT:   ccmpow {dfv=}	%r16w, %r17w
423# INTEL: ccmpo {dfv=}	r17w, r16w
4240x62,0xec,0x05,0x00,0x3b,0xc8
425
426# ATT:   ccmpol {dfv=}	%r16d, %r17d
427# INTEL: ccmpo {dfv=}	r17d, r16d
4280x62,0xec,0x04,0x00,0x3b,0xc8
429
430# ATT:   ccmpoq {dfv=}	%r16, %r17
431# INTEL: ccmpo {dfv=}	r17, r16
4320x62,0xec,0x84,0x00,0x3b,0xc8
433
434## cfcmov
435
436# ATT:   cfcmovbew	%r16w, %r17w
437# INTEL: cfcmovbe	r17w, r16w
4380x62,0xec,0x7d,0x08,0x46,0xc8
439
440# ATT:   cfcmovbel	%r16d, %r17d
441# INTEL: cfcmovbe	r17d, r16d
4420x62,0xec,0x7c,0x08,0x46,0xc8
443
444# ATT:   cfcmovbeq	%r16, %r17
445# INTEL: cfcmovbe	r17, r16
4460x62,0xec,0xfc,0x08,0x46,0xc8
447