xref: /llvm-project/llvm/test/MC/Disassembler/X86/apx/andn.txt (revision 816cc9d24b8716367e85d582c7afdfb1cdfcdbf3)
1# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
2# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
3
4# ATT:   {nf}	andnl	%ecx, %edx, %r10d
5# INTEL: {nf}	andn	r10d, edx, ecx
60x62,0x72,0x6c,0x0c,0xf2,0xd1
7
8# ATT:   andnl	%ecx, %edx, %r10d
9# INTEL: andn	r10d, edx, ecx
100x62,0x72,0x6c,0x08,0xf2,0xd1
11
12# ATT:   {nf}	andnq	%r9, %r15, %r11
13# INTEL: {nf}	andn	r11, r15, r9
140x62,0x52,0x84,0x0c,0xf2,0xd9
15
16# ATT:   andnq	%r9, %r15, %r11
17# INTEL: andn	r11, r15, r9
180x62,0x52,0x84,0x08,0xf2,0xd9
19
20# ATT:   {nf}	andnl	123(%rax,%rbx,4), %ecx, %edx
21# INTEL: {nf}	andn	edx, ecx, dword ptr [rax + 4*rbx + 123]
220x62,0xf2,0x74,0x0c,0xf2,0x54,0x98,0x7b
23
24# ATT:   andnl	123(%rax,%rbx,4), %ecx, %edx
25# INTEL: andn	edx, ecx, dword ptr [rax + 4*rbx + 123]
260x62,0xf2,0x74,0x08,0xf2,0x54,0x98,0x7b
27
28# ATT:   {nf}	andnq	123(%rax,%rbx,4), %r9, %r15
29# INTEL: {nf}	andn	r15, r9, qword ptr [rax + 4*rbx + 123]
300x62,0x72,0xb4,0x0c,0xf2,0x7c,0x98,0x7b
31
32# ATT:   andnq	123(%rax,%rbx,4), %r9, %r15
33# INTEL: andn	r15, r9, qword ptr [rax + 4*rbx + 123]
340x62,0x72,0xb4,0x08,0xf2,0x7c,0x98,0x7b
35
36# ATT:   andnl	%r18d, %r22d, %r26d
37# INTEL: andn	r26d, r22d, r18d
380x62,0x6a,0x4c,0x00,0xf2,0xd2
39
40# ATT:   andnq	%r19, %r23, %r27
41# INTEL: andn	r27, r23, r19
420x62,0x6a,0xc4,0x00,0xf2,0xdb
43
44# ATT:   andnl	291(%r28,%r29,4), %r18d, %r22d
45# INTEL: andn	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
460x62,0x8a,0x68,0x00,0xf2,0xb4,0xac,0x23,0x01,0x00,0x00
47
48# ATT:   andnq	291(%r28,%r29,4), %r19, %r23
49# INTEL: andn	r23, r19, qword ptr [r28 + 4*r29 + 291]
500x62,0x8a,0xe0,0x00,0xf2,0xbc,0xac,0x23,0x01,0x00,0x00
51