xref: /llvm-project/llvm/test/MC/Disassembler/ARM/thumb2-diagnostic.txt (revision 3a3419460647612fba9dbecbd770fc8c84bbc05a)
1# RUN: llvm-mc -triple=thumbv7 -disassemble %s 2>&1 | \
2# RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V7
3# RUN: llvm-mc -triple=thumbv8 -disassemble %s 2>&1 | \
4# RUN: FileCheck %s --check-prefix=CHECK
5
6# tbb [r0, sp]
70xd0 0xe8 0x0d 0xf0
8#      CHECK-V7: warning: potentially undefined instruction encoding
9# CHECK-V7-NEXT: 0xd0 0xe8 0x0d 0xf0
10
11# tbb [r0, pc]
120xd0 0xe8 0x0f 0xf0
13#      CHECK: warning: potentially undefined instruction encoding
14# CHECK-NEXT: 0xd0 0xe8 0x0f 0xf0
15
16# tbb [sp, r0]
170xdd 0xe8 0x00 0xf0
18#      CHECK-V7: warning: potentially undefined instruction encoding
19# CHECK-V7-NEXT: 0xdd 0xe8 0x00 0xf0
20
21# tbb [pc, r0]
220xdf 0xe8 0x00 0xf0
23
24# tbh [r0, sp, lsl #1]
250xd0 0xe8 0x1d 0xf0
26#      CHECK-V7: warning: potentially undefined instruction encoding
27# CHECK-V7-NEXT: 0xd0 0xe8 0x1d 0xf0
28
29# tbh [r0, pc, lsl #1]
300xd0 0xe8 0x1f 0xf0
31#      CHECK: warning: potentially undefined instruction encoding
32# CHECK-NEXT: 0xd0 0xe8 0x1f 0xf0
33
34# tbh [sp, r0, lsl #1]
350xdd 0xe8 0x10 0xf0
36#      CHECK-V7: warning: potentially undefined instruction encoding
37# CHECK-V7-NEXT: 0xdd 0xe8 0x10 0xf0
38
39# tbh [pc, r0, lsl #1]
400xdf 0xe8 0x10 0xf0
41
42# CHECK: tbb [r0, sp]
43# CHECK: tbb [r0, pc]
44# CHECK: tbb [sp, r0]
45# CHECK: tbb [pc, r0]
46# CHECK: tbh [r0, sp, lsl #1]
47# CHECK: tbh [r0, pc, lsl #1]
48# CHECK: tbh [sp, r0, lsl #1]
49# CHECK: tbh [pc, r0, lsl #1]
50