xref: /llvm-project/llvm/test/MC/Disassembler/AArch64/ldp-offset-predictable.txt (revision 4ec135fa2eee0442a8cb4f4c0be493ba224da058) 
1# RUN: llvm-mc -triple=aarch64 -disassemble < %s 2>&1 | FileCheck %s
2# RUN: llvm-mc -triple=arm64 -disassemble < %s 2>&1 | FileCheck %s
3
4# Stores are OK.
50xe0 0x83 0x00 0xa9
6# CHECK-NOT: potentially undefined instruction encoding
7# CHECK: stp x0, x0, [sp, #8]
8
9