xref: /llvm-project/llvm/test/MC/AMDGPU/pal-registers.s (revision aab709f090f5f3bcd282bd71fbddce706da8dd06) 
1// RUN: llvm-mc -triple amdgcn--amdpal %s | FileCheck %s
2
3	.amdgpu_pal_metadata
4---
5amdpal.pipelines:
6  - .hardware_stages:
7      .ps:
8        .entry_point:    ps_amdpal
9        .scratch_memory_size: 0
10        .sgpr_count:     0x1
11        .vgpr_count:     0x1
12    .internal_pipeline_hash:
13      - 0x123456789abcdef0
14      - 0xfedcba9876543210
15    .registers:
16      0x2c06: 0
17      0x2c07: 0
18      0x2c0a: 0
19      0x2c0b: 0
20      0x2c0c: 0
21      0x2c0d: 0
22      0x2c0e: 0
23      0x2c0f: 0
24      0x2c10: 0
25      0x2c11: 0
26      0x2c12: 0
27      0x2c13: 0
28      0x2c14: 0
29      0x2c15: 0
30      0x2c16: 0
31      0x2c17: 0
32      0x2c18: 0
33      0x2c19: 0
34      0x2c1a: 0
35      0x2c1b: 0
36      0x2c1c: 0
37      0x2c1d: 0
38      0x2c1e: 0
39      0x2c1f: 0
40      0x2c20: 0
41      0x2c21: 0
42      0x2c22: 0
43      0x2c23: 0
44      0x2c24: 0
45      0x2c25: 0
46      0x2c26: 0
47      0x2c27: 0
48      0x2c28: 0
49      0x2c29: 0
50      0x2c2a: 0
51      0x2c2b: 0
52      0x2c32: 0
53      0x2c33: 0
54      0x2c34: 0
55      0x2c35: 0
56      0x2c45: 0
57      0x2c46: 0
58      0x2c4a: 0
59      0x2c4b: 0
60      0x2c4c: 0
61      0x2c4d: 0
62      0x2c4e: 0
63      0x2c4f: 0
64      0x2c50: 0
65      0x2c51: 0
66      0x2c52: 0
67      0x2c53: 0
68      0x2c54: 0
69      0x2c55: 0
70      0x2c56: 0
71      0x2c57: 0
72      0x2c58: 0
73      0x2c59: 0
74      0x2c5a: 0
75      0x2c5b: 0
76      0x2c5c: 0
77      0x2c5d: 0
78      0x2c5e: 0
79      0x2c5f: 0
80      0x2c60: 0
81      0x2c61: 0
82      0x2c62: 0
83      0x2c63: 0
84      0x2c64: 0
85      0x2c65: 0
86      0x2c66: 0
87      0x2c67: 0
88      0x2c68: 0
89      0x2c69: 0
90      0x2c6a: 0
91      0x2c6b: 0
92      0x2c72: 0
93      0x2c73: 0
94      0x2c74: 0
95      0x2c75: 0
96      0x2c80: 0
97      0x2c81: 0
98      0x2c87: 0
99      0x2c88: 0
100      0x2c8a: 0
101      0x2c8b: 0
102      0x2c8c: 0
103      0x2c8d: 0
104      0x2c8e: 0
105      0x2c8f: 0
106      0x2c90: 0
107      0x2c91: 0
108      0x2c92: 0
109      0x2c93: 0
110      0x2c94: 0
111      0x2c95: 0
112      0x2c96: 0
113      0x2c97: 0
114      0x2c98: 0
115      0x2c99: 0
116      0x2c9a: 0
117      0x2c9b: 0
118      0x2c9c: 0
119      0x2c9d: 0
120      0x2c9e: 0
121      0x2c9f: 0
122      0x2ca0: 0
123      0x2ca1: 0
124      0x2ca2: 0
125      0x2ca3: 0
126      0x2ca4: 0
127      0x2ca5: 0
128      0x2ca6: 0
129      0x2ca7: 0
130      0x2ca8: 0
131      0x2ca9: 0
132      0x2caa: 0
133      0x2cab: 0
134      0x2cb2: 0
135      0x2cb3: 0
136      0x2cb4: 0
137      0x2cb5: 0
138      0x2cc7: 0
139      0x2cca: 0
140      0x2ccb: 0
141      0x2ccc: 0
142      0x2ccd: 0
143      0x2cce: 0
144      0x2ccf: 0
145      0x2cd0: 0
146      0x2cd1: 0
147      0x2cd2: 0
148      0x2cd3: 0
149      0x2cd4: 0
150      0x2cd5: 0
151      0x2cd6: 0
152      0x2cd7: 0
153      0x2cd8: 0
154      0x2cd9: 0
155      0x2cda: 0
156      0x2cdb: 0
157      0x2cdc: 0
158      0x2cdd: 0
159      0x2cde: 0
160      0x2cdf: 0
161      0x2ce0: 0
162      0x2ce1: 0
163      0x2ce2: 0
164      0x2ce3: 0
165      0x2ce4: 0
166      0x2ce5: 0
167      0x2ce6: 0
168      0x2ce7: 0
169      0x2ce8: 0
170      0x2ce9: 0
171      0x2cea: 0
172      0x2ceb: 0
173      0x2d00: 0
174      0x2d07: 0
175      0x2d0a: 0
176      0x2d0b: 0
177      0x2d0c: 0
178      0x2d0d: 0
179      0x2d0e: 0
180      0x2d0f: 0
181      0x2d10: 0
182      0x2d11: 0
183      0x2d12: 0
184      0x2d13: 0
185      0x2d14: 0
186      0x2d15: 0
187      0x2d16: 0
188      0x2d17: 0
189      0x2d18: 0
190      0x2d19: 0
191      0x2d1a: 0
192      0x2d1b: 0
193      0x2d1c: 0
194      0x2d1d: 0
195      0x2d1e: 0
196      0x2d1f: 0
197      0x2d20: 0
198      0x2d21: 0
199      0x2d22: 0
200      0x2d23: 0
201      0x2d24: 0
202      0x2d25: 0
203      0x2d26: 0
204      0x2d27: 0
205      0x2d28: 0
206      0x2d29: 0
207      0x2d2a: 0
208      0x2d2b: 0
209      0x2d32: 0
210      0x2d33: 0
211      0x2d34: 0
212      0x2d35: 0
213      0x2d47: 0
214      0x2d4a: 0
215      0x2d4b: 0
216      0x2d4c: 0
217      0x2d4d: 0
218      0x2d4e: 0
219      0x2d4f: 0
220      0x2d50: 0
221      0x2d51: 0
222      0x2d52: 0
223      0x2d53: 0
224      0x2d54: 0
225      0x2d55: 0
226      0x2d56: 0
227      0x2d57: 0
228      0x2d58: 0
229      0x2d59: 0
230      0x2d5a: 0
231      0x2d5b: 0
232      0x2e00: 0
233      0x2e07: 0
234      0x2e08: 0
235      0x2e09: 0
236      0x2e12: 0
237      0x2e13: 0
238      0x2e18: 0
239      0x2e24: 0
240      0x2e25: 0
241      0x2e26: 0
242      0x2e27: 0
243      0x2e28: 0
244      0x2e2a: 0
245      0x2e40: 0
246      0x2e41: 0
247      0x2e42: 0
248      0x2e43: 0
249      0x2e44: 0
250      0x2e45: 0
251      0x2e46: 0
252      0x2e47: 0
253      0x2e48: 0
254      0x2e49: 0
255      0x2e4a: 0
256      0x2e4b: 0
257      0x2e4c: 0
258      0x2e4d: 0
259      0x2e4e: 0
260      0x2e4f: 0
261      0xa08f: 0
262      0xa191: 0
263      0xa192: 0
264      0xa193: 0
265      0xa194: 0
266      0xa195: 0
267      0xa196: 0
268      0xa197: 0
269      0xa198: 0
270      0xa199: 0
271      0xa19a: 0
272      0xa19b: 0
273      0xa19c: 0
274      0xa19d: 0
275      0xa19e: 0
276      0xa19f: 0
277      0xa1a0: 0
278      0xa1a1: 0
279      0xa1a2: 0
280      0xa1a3: 0
281      0xa1a4: 0
282      0xa1a5: 0
283      0xa1a6: 0
284      0xa1a7: 0
285      0xa1a8: 0
286      0xa1a9: 0
287      0xa1aa: 0
288      0xa1ab: 0
289      0xa1ac: 0
290      0xa1ad: 0
291      0xa1ae: 0
292      0xa1af: 0
293      0xa1b0: 0
294      0xa1b1: 0
295      0xa1b3: 0
296      0xa1b4: 0
297      0xa1b5: 0
298      0xa1b6: 0
299      0xa1b8: 0
300      0xa1ba: 0
301      0xa1c2: 0
302      0xa1c3: 0
303      0xa1c4: 0
304      0xa1c5: 0
305      0xa1ff: 0
306      0xa203: 0
307      0xa204: 0
308      0xa206: 0
309      0xa207: 0
310      0xa210: 0
311      0xa286: 0
312      0xa287: 0
313      0xa290: 0
314      0xa291: 0
315      0xa293: 0
316      0xa297: 0
317      0xa298: 0
318      0xa299: 0
319      0xa29a: 0
320      0xa29b: 0
321      0xa2a1: 0
322      0xa2a5: 0
323      0xa2aa: 0
324      0xa2ab: 0
325      0xa2ac: 0
326      0xa2ad: 0
327      0xa2b5: 0
328      0xa2b9: 0
329      0xa2bd: 0
330      0xa2c1: 0
331      0xa2ce: 0
332      0xa2d3: 0
333      0xa2d5: 0
334      0xa2d6: 0
335      0xa2d7: 0
336      0xa2d8: 0
337      0xa2d9: 0
338      0xa2da: 0
339      0xa2db: 0
340      0xa2e4: 0
341      0xa2e5: 0
342      0xa2e6: 0
343      0xa2f8: 0
344      0xa2f9: 0
345      0xa310: 0
346      0xa313: 0
347      0xa316: 0
348      0xc258: 0
349      0xc25f: 0
350      0xc262: 0
351...
352	.end_amdgpu_pal_metadata
353
354// CHECK: 0x2c06 (SPI_SHADER_PGM_CHKSUM_PS)
355// CHECK: 0x2c07 (SPI_SHADER_PGM_RSRC3_PS)
356// CHECK: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS)
357// CHECK: 0x2c0b (SPI_SHADER_PGM_RSRC2_PS)
358// CHECK: 0x2c0c (SPI_SHADER_USER_DATA_PS_0)
359// CHECK: 0x2c0d (SPI_SHADER_USER_DATA_PS_1)
360// CHECK: 0x2c0e (SPI_SHADER_USER_DATA_PS_2)
361// CHECK: 0x2c0f (SPI_SHADER_USER_DATA_PS_3)
362// CHECK: 0x2c10 (SPI_SHADER_USER_DATA_PS_4)
363// CHECK: 0x2c11 (SPI_SHADER_USER_DATA_PS_5)
364// CHECK: 0x2c12 (SPI_SHADER_USER_DATA_PS_6)
365// CHECK: 0x2c13 (SPI_SHADER_USER_DATA_PS_7)
366// CHECK: 0x2c14 (SPI_SHADER_USER_DATA_PS_8)
367// CHECK: 0x2c15 (SPI_SHADER_USER_DATA_PS_9)
368// CHECK: 0x2c16 (SPI_SHADER_USER_DATA_PS_10)
369// CHECK: 0x2c17 (SPI_SHADER_USER_DATA_PS_11)
370// CHECK: 0x2c18 (SPI_SHADER_USER_DATA_PS_12)
371// CHECK: 0x2c19 (SPI_SHADER_USER_DATA_PS_13)
372// CHECK: 0x2c1a (SPI_SHADER_USER_DATA_PS_14)
373// CHECK: 0x2c1b (SPI_SHADER_USER_DATA_PS_15)
374// CHECK: 0x2c1c (SPI_SHADER_USER_DATA_PS_16)
375// CHECK: 0x2c1d (SPI_SHADER_USER_DATA_PS_17)
376// CHECK: 0x2c1e (SPI_SHADER_USER_DATA_PS_18)
377// CHECK: 0x2c1f (SPI_SHADER_USER_DATA_PS_19)
378// CHECK: 0x2c20 (SPI_SHADER_USER_DATA_PS_20)
379// CHECK: 0x2c21 (SPI_SHADER_USER_DATA_PS_21)
380// CHECK: 0x2c22 (SPI_SHADER_USER_DATA_PS_22)
381// CHECK: 0x2c23 (SPI_SHADER_USER_DATA_PS_23)
382// CHECK: 0x2c24 (SPI_SHADER_USER_DATA_PS_24)
383// CHECK: 0x2c25 (SPI_SHADER_USER_DATA_PS_25)
384// CHECK: 0x2c26 (SPI_SHADER_USER_DATA_PS_26)
385// CHECK: 0x2c27 (SPI_SHADER_USER_DATA_PS_27)
386// CHECK: 0x2c28 (SPI_SHADER_USER_DATA_PS_28)
387// CHECK: 0x2c29 (SPI_SHADER_USER_DATA_PS_29)
388// CHECK: 0x2c2a (SPI_SHADER_USER_DATA_PS_30)
389// CHECK: 0x2c2b (SPI_SHADER_USER_DATA_PS_31)
390// CHECK: 0x2c32 (SPI_SHADER_USER_ACCUM_PS_0)
391// CHECK: 0x2c33 (SPI_SHADER_USER_ACCUM_PS_1)
392// CHECK: 0x2c34 (SPI_SHADER_USER_ACCUM_PS_2)
393// CHECK: 0x2c35 (SPI_SHADER_USER_ACCUM_PS_3)
394// CHECK: 0x2c45 (SPI_SHADER_PGM_CHKSUM_VS)
395// CHECK: 0x2c46 (SPI_SHADER_PGM_RSRC3_VS)
396// CHECK: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS)
397// CHECK: 0x2c4b (SPI_SHADER_PGM_RSRC2_VS)
398// CHECK: 0x2c4c (SPI_SHADER_USER_DATA_VS_0)
399// CHECK: 0x2c4d (SPI_SHADER_USER_DATA_VS_1)
400// CHECK: 0x2c4e (SPI_SHADER_USER_DATA_VS_2)
401// CHECK: 0x2c4f (SPI_SHADER_USER_DATA_VS_3)
402// CHECK: 0x2c50 (SPI_SHADER_USER_DATA_VS_4)
403// CHECK: 0x2c51 (SPI_SHADER_USER_DATA_VS_5)
404// CHECK: 0x2c52 (SPI_SHADER_USER_DATA_VS_6)
405// CHECK: 0x2c53 (SPI_SHADER_USER_DATA_VS_7)
406// CHECK: 0x2c54 (SPI_SHADER_USER_DATA_VS_8)
407// CHECK: 0x2c55 (SPI_SHADER_USER_DATA_VS_9)
408// CHECK: 0x2c56 (SPI_SHADER_USER_DATA_VS_10)
409// CHECK: 0x2c57 (SPI_SHADER_USER_DATA_VS_11)
410// CHECK: 0x2c58 (SPI_SHADER_USER_DATA_VS_12)
411// CHECK: 0x2c59 (SPI_SHADER_USER_DATA_VS_13)
412// CHECK: 0x2c5a (SPI_SHADER_USER_DATA_VS_14)
413// CHECK: 0x2c5b (SPI_SHADER_USER_DATA_VS_15)
414// CHECK: 0x2c5c (SPI_SHADER_USER_DATA_VS_16)
415// CHECK: 0x2c5d (SPI_SHADER_USER_DATA_VS_17)
416// CHECK: 0x2c5e (SPI_SHADER_USER_DATA_VS_18)
417// CHECK: 0x2c5f (SPI_SHADER_USER_DATA_VS_19)
418// CHECK: 0x2c60 (SPI_SHADER_USER_DATA_VS_20)
419// CHECK: 0x2c61 (SPI_SHADER_USER_DATA_VS_21)
420// CHECK: 0x2c62 (SPI_SHADER_USER_DATA_VS_22)
421// CHECK: 0x2c63 (SPI_SHADER_USER_DATA_VS_23)
422// CHECK: 0x2c64 (SPI_SHADER_USER_DATA_VS_24)
423// CHECK: 0x2c65 (SPI_SHADER_USER_DATA_VS_25)
424// CHECK: 0x2c66 (SPI_SHADER_USER_DATA_VS_26)
425// CHECK: 0x2c67 (SPI_SHADER_USER_DATA_VS_27)
426// CHECK: 0x2c68 (SPI_SHADER_USER_DATA_VS_28)
427// CHECK: 0x2c69 (SPI_SHADER_USER_DATA_VS_29)
428// CHECK: 0x2c6a (SPI_SHADER_USER_DATA_VS_30)
429// CHECK: 0x2c6b (SPI_SHADER_USER_DATA_VS_31)
430// CHECK: 0x2c72 (SPI_SHADER_USER_ACCUM_VS_0)
431// CHECK: 0x2c73 (SPI_SHADER_USER_ACCUM_VS_1)
432// CHECK: 0x2c74 (SPI_SHADER_USER_ACCUM_VS_2)
433// CHECK: 0x2c75 (SPI_SHADER_USER_ACCUM_VS_3)
434// CHECK: 0x2c80 (SPI_SHADER_PGM_CHKSUM_GS)
435// CHECK: 0x2c81 (SPI_SHADER_PGM_RSRC4_GS)
436// CHECK: 0x2c87 (SPI_SHADER_PGM_RSRC3_GS)
437// CHECK: 0x2c88 (SPI_SHADER_PGM_LO_GS)
438// CHECK: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS)
439// CHECK: 0x2c8b (SPI_SHADER_PGM_RSRC2_GS)
440// CHECK: 0x2c8c (SPI_SHADER_USER_DATA_GS_0)
441// CHECK: 0x2c8d (SPI_SHADER_USER_DATA_GS_1)
442// CHECK: 0x2c8e (SPI_SHADER_USER_DATA_GS_2)
443// CHECK: 0x2c8f (SPI_SHADER_USER_DATA_GS_3)
444// CHECK: 0x2c90 (SPI_SHADER_USER_DATA_GS_4)
445// CHECK: 0x2c91 (SPI_SHADER_USER_DATA_GS_5)
446// CHECK: 0x2c92 (SPI_SHADER_USER_DATA_GS_6)
447// CHECK: 0x2c93 (SPI_SHADER_USER_DATA_GS_7)
448// CHECK: 0x2c94 (SPI_SHADER_USER_DATA_GS_8)
449// CHECK: 0x2c95 (SPI_SHADER_USER_DATA_GS_9)
450// CHECK: 0x2c96 (SPI_SHADER_USER_DATA_GS_10)
451// CHECK: 0x2c97 (SPI_SHADER_USER_DATA_GS_11)
452// CHECK: 0x2c98 (SPI_SHADER_USER_DATA_GS_12)
453// CHECK: 0x2c99 (SPI_SHADER_USER_DATA_GS_13)
454// CHECK: 0x2c9a (SPI_SHADER_USER_DATA_GS_14)
455// CHECK: 0x2c9b (SPI_SHADER_USER_DATA_GS_15)
456// CHECK: 0x2c9c (SPI_SHADER_USER_DATA_GS_16)
457// CHECK: 0x2c9d (SPI_SHADER_USER_DATA_GS_17)
458// CHECK: 0x2c9e (SPI_SHADER_USER_DATA_GS_18)
459// CHECK: 0x2c9f (SPI_SHADER_USER_DATA_GS_19)
460// CHECK: 0x2ca0 (SPI_SHADER_USER_DATA_GS_20)
461// CHECK: 0x2ca1 (SPI_SHADER_USER_DATA_GS_21)
462// CHECK: 0x2ca2 (SPI_SHADER_USER_DATA_GS_22)
463// CHECK: 0x2ca3 (SPI_SHADER_USER_DATA_GS_23)
464// CHECK: 0x2ca4 (SPI_SHADER_USER_DATA_GS_24)
465// CHECK: 0x2ca5 (SPI_SHADER_USER_DATA_GS_25)
466// CHECK: 0x2ca6 (SPI_SHADER_USER_DATA_GS_26)
467// CHECK: 0x2ca7 (SPI_SHADER_USER_DATA_GS_27)
468// CHECK: 0x2ca8 (SPI_SHADER_USER_DATA_GS_28)
469// CHECK: 0x2ca9 (SPI_SHADER_USER_DATA_GS_29)
470// CHECK: 0x2caa (SPI_SHADER_USER_DATA_GS_30)
471// CHECK: 0x2cab (SPI_SHADER_USER_DATA_GS_31)
472// CHECK: 0x2cb2 (SPI_SHADER_USER_ACCUM_ESGS_0)
473// CHECK: 0x2cb3 (SPI_SHADER_USER_ACCUM_ESGS_1)
474// CHECK: 0x2cb4 (SPI_SHADER_USER_ACCUM_ESGS_2)
475// CHECK: 0x2cb5 (SPI_SHADER_USER_ACCUM_ESGS_3)
476// CHECK: 0x2cc7 (SPI_SHADER_PGM_RSRC3_ES)
477// CHECK: 0x2cca (SPI_SHADER_PGM_RSRC1_ES)
478// CHECK: 0x2ccb (SPI_SHADER_PGM_RSRC2_ES)
479// CHECK: 0x2ccc (SPI_SHADER_USER_DATA_ES_0)
480// CHECK: 0x2ccd (SPI_SHADER_USER_DATA_ES_1)
481// CHECK: 0x2cce (SPI_SHADER_USER_DATA_ES_2)
482// CHECK: 0x2ccf (SPI_SHADER_USER_DATA_ES_3)
483// CHECK: 0x2cd0 (SPI_SHADER_USER_DATA_ES_4)
484// CHECK: 0x2cd1 (SPI_SHADER_USER_DATA_ES_5)
485// CHECK: 0x2cd2 (SPI_SHADER_USER_DATA_ES_6)
486// CHECK: 0x2cd3 (SPI_SHADER_USER_DATA_ES_7)
487// CHECK: 0x2cd4 (SPI_SHADER_USER_DATA_ES_8)
488// CHECK: 0x2cd5 (SPI_SHADER_USER_DATA_ES_9)
489// CHECK: 0x2cd6 (SPI_SHADER_USER_DATA_ES_10)
490// CHECK: 0x2cd7 (SPI_SHADER_USER_DATA_ES_11)
491// CHECK: 0x2cd8 (SPI_SHADER_USER_DATA_ES_12)
492// CHECK: 0x2cd9 (SPI_SHADER_USER_DATA_ES_13)
493// CHECK: 0x2cda (SPI_SHADER_USER_DATA_ES_14)
494// CHECK: 0x2cdb (SPI_SHADER_USER_DATA_ES_15)
495// CHECK: 0x2cdc (SPI_SHADER_USER_DATA_ES_16)
496// CHECK: 0x2cdd (SPI_SHADER_USER_DATA_ES_17)
497// CHECK: 0x2cde (SPI_SHADER_USER_DATA_ES_18)
498// CHECK: 0x2cdf (SPI_SHADER_USER_DATA_ES_19)
499// CHECK: 0x2ce0 (SPI_SHADER_USER_DATA_ES_20)
500// CHECK: 0x2ce1 (SPI_SHADER_USER_DATA_ES_21)
501// CHECK: 0x2ce2 (SPI_SHADER_USER_DATA_ES_22)
502// CHECK: 0x2ce3 (SPI_SHADER_USER_DATA_ES_23)
503// CHECK: 0x2ce4 (SPI_SHADER_USER_DATA_ES_24)
504// CHECK: 0x2ce5 (SPI_SHADER_USER_DATA_ES_25)
505// CHECK: 0x2ce6 (SPI_SHADER_USER_DATA_ES_26)
506// CHECK: 0x2ce7 (SPI_SHADER_USER_DATA_ES_27)
507// CHECK: 0x2ce8 (SPI_SHADER_USER_DATA_ES_28)
508// CHECK: 0x2ce9 (SPI_SHADER_USER_DATA_ES_29)
509// CHECK: 0x2cea (SPI_SHADER_USER_DATA_ES_30)
510// CHECK: 0x2ceb (SPI_SHADER_USER_DATA_ES_31)
511// CHECK: 0x2d00 (SPI_SHADER_PGM_CHKSUM_HS)
512// CHECK: 0x2d07 (SPI_SHADER_PGM_RSRC3_HS)
513// CHECK: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS)
514// CHECK: 0x2d0b (SPI_SHADER_PGM_RSRC2_HS)
515// CHECK: 0x2d0c (SPI_SHADER_USER_DATA_HS_0)
516// CHECK: 0x2d0d (SPI_SHADER_USER_DATA_HS_1)
517// CHECK: 0x2d0e (SPI_SHADER_USER_DATA_HS_2)
518// CHECK: 0x2d0f (SPI_SHADER_USER_DATA_HS_3)
519// CHECK: 0x2d10 (SPI_SHADER_USER_DATA_HS_4)
520// CHECK: 0x2d11 (SPI_SHADER_USER_DATA_HS_5)
521// CHECK: 0x2d12 (SPI_SHADER_USER_DATA_HS_6)
522// CHECK: 0x2d13 (SPI_SHADER_USER_DATA_HS_7)
523// CHECK: 0x2d14 (SPI_SHADER_USER_DATA_HS_8)
524// CHECK: 0x2d15 (SPI_SHADER_USER_DATA_HS_9)
525// CHECK: 0x2d16 (SPI_SHADER_USER_DATA_HS_10)
526// CHECK: 0x2d17 (SPI_SHADER_USER_DATA_HS_11)
527// CHECK: 0x2d18 (SPI_SHADER_USER_DATA_HS_12)
528// CHECK: 0x2d19 (SPI_SHADER_USER_DATA_HS_13)
529// CHECK: 0x2d1a (SPI_SHADER_USER_DATA_HS_14)
530// CHECK: 0x2d1b (SPI_SHADER_USER_DATA_HS_15)
531// CHECK: 0x2d1c (SPI_SHADER_USER_DATA_HS_16)
532// CHECK: 0x2d1d (SPI_SHADER_USER_DATA_HS_17)
533// CHECK: 0x2d1e (SPI_SHADER_USER_DATA_HS_18)
534// CHECK: 0x2d1f (SPI_SHADER_USER_DATA_HS_19)
535// CHECK: 0x2d20 (SPI_SHADER_USER_DATA_HS_20)
536// CHECK: 0x2d21 (SPI_SHADER_USER_DATA_HS_21)
537// CHECK: 0x2d22 (SPI_SHADER_USER_DATA_HS_22)
538// CHECK: 0x2d23 (SPI_SHADER_USER_DATA_HS_23)
539// CHECK: 0x2d24 (SPI_SHADER_USER_DATA_HS_24)
540// CHECK: 0x2d25 (SPI_SHADER_USER_DATA_HS_25)
541// CHECK: 0x2d26 (SPI_SHADER_USER_DATA_HS_26)
542// CHECK: 0x2d27 (SPI_SHADER_USER_DATA_HS_27)
543// CHECK: 0x2d28 (SPI_SHADER_USER_DATA_HS_28)
544// CHECK: 0x2d29 (SPI_SHADER_USER_DATA_HS_29)
545// CHECK: 0x2d2a (SPI_SHADER_USER_DATA_HS_30)
546// CHECK: 0x2d2b (SPI_SHADER_USER_DATA_HS_31)
547// CHECK: 0x2d32 (SPI_SHADER_USER_ACCUM_LSHS_0)
548// CHECK: 0x2d33 (SPI_SHADER_USER_ACCUM_LSHS_1)
549// CHECK: 0x2d34 (SPI_SHADER_USER_ACCUM_LSHS_2)
550// CHECK: 0x2d35 (SPI_SHADER_USER_ACCUM_LSHS_3)
551// CHECK: 0x2d47 (SPI_SHADER_PGM_RSRC3_LS)
552// CHECK: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS)
553// CHECK: 0x2d4b (SPI_SHADER_PGM_RSRC2_LS)
554// CHECK: 0x2d4c (SPI_SHADER_USER_DATA_LS_0)
555// CHECK: 0x2d4d (SPI_SHADER_USER_DATA_LS_1)
556// CHECK: 0x2d4e (SPI_SHADER_USER_DATA_LS_2)
557// CHECK: 0x2d4f (SPI_SHADER_USER_DATA_LS_3)
558// CHECK: 0x2d50 (SPI_SHADER_USER_DATA_LS_4)
559// CHECK: 0x2d51 (SPI_SHADER_USER_DATA_LS_5)
560// CHECK: 0x2d52 (SPI_SHADER_USER_DATA_LS_6)
561// CHECK: 0x2d53 (SPI_SHADER_USER_DATA_LS_7)
562// CHECK: 0x2d54 (SPI_SHADER_USER_DATA_LS_8)
563// CHECK: 0x2d55 (SPI_SHADER_USER_DATA_LS_9)
564// CHECK: 0x2d56 (SPI_SHADER_USER_DATA_LS_10)
565// CHECK: 0x2d57 (SPI_SHADER_USER_DATA_LS_11)
566// CHECK: 0x2d58 (SPI_SHADER_USER_DATA_LS_12)
567// CHECK: 0x2d59 (SPI_SHADER_USER_DATA_LS_13)
568// CHECK: 0x2d5a (SPI_SHADER_USER_DATA_LS_14)
569// CHECK: 0x2d5b (SPI_SHADER_USER_DATA_LS_15)
570// CHECK: 0x2e00 (COMPUTE_DISPATCH_INITIATOR)
571// CHECK: 0x2e07 (COMPUTE_NUM_THREAD_X)
572// CHECK: 0x2e08 (COMPUTE_NUM_THREAD_Y)
573// CHECK: 0x2e09 (COMPUTE_NUM_THREAD_Z)
574// CHECK: 0x2e12 (COMPUTE_PGM_RSRC1)
575// CHECK: 0x2e13 (COMPUTE_PGM_RSRC2)
576// CHECK: 0x2e18 (COMPUTE_TMPRING_SIZE)
577// CHECK: 0x2e24 (COMPUTE_USER_ACCUM_0)
578// CHECK: 0x2e25 (COMPUTE_USER_ACCUM_1)
579// CHECK: 0x2e26 (COMPUTE_USER_ACCUM_2)
580// CHECK: 0x2e27 (COMPUTE_USER_ACCUM_3)
581// CHECK: 0x2e28 (COMPUTE_PGM_RSRC3)
582// CHECK: 0x2e2a (COMPUTE_SHADER_CHKSUM)
583// CHECK: 0x2e40 (COMPUTE_USER_DATA_0)
584// CHECK: 0x2e41 (COMPUTE_USER_DATA_1)
585// CHECK: 0x2e42 (COMPUTE_USER_DATA_2)
586// CHECK: 0x2e43 (COMPUTE_USER_DATA_3)
587// CHECK: 0x2e44 (COMPUTE_USER_DATA_4)
588// CHECK: 0x2e45 (COMPUTE_USER_DATA_5)
589// CHECK: 0x2e46 (COMPUTE_USER_DATA_6)
590// CHECK: 0x2e47 (COMPUTE_USER_DATA_7)
591// CHECK: 0x2e48 (COMPUTE_USER_DATA_8)
592// CHECK: 0x2e49 (COMPUTE_USER_DATA_9)
593// CHECK: 0x2e4a (COMPUTE_USER_DATA_10)
594// CHECK: 0x2e4b (COMPUTE_USER_DATA_11)
595// CHECK: 0x2e4c (COMPUTE_USER_DATA_12)
596// CHECK: 0x2e4d (COMPUTE_USER_DATA_13)
597// CHECK: 0x2e4e (COMPUTE_USER_DATA_14)
598// CHECK: 0x2e4f (COMPUTE_USER_DATA_15)
599// CHECK: 0xa08f (CB_SHADER_MASK)
600// CHECK: 0xa191 (SPI_PS_INPUT_CNTL_0)
601// CHECK: 0xa192 (SPI_PS_INPUT_CNTL_1)
602// CHECK: 0xa193 (SPI_PS_INPUT_CNTL_2)
603// CHECK: 0xa194 (SPI_PS_INPUT_CNTL_3)
604// CHECK: 0xa195 (SPI_PS_INPUT_CNTL_4)
605// CHECK: 0xa196 (SPI_PS_INPUT_CNTL_5)
606// CHECK: 0xa197 (SPI_PS_INPUT_CNTL_6)
607// CHECK: 0xa198 (SPI_PS_INPUT_CNTL_7)
608// CHECK: 0xa199 (SPI_PS_INPUT_CNTL_8)
609// CHECK: 0xa19a (SPI_PS_INPUT_CNTL_9)
610// CHECK: 0xa19b (SPI_PS_INPUT_CNTL_10)
611// CHECK: 0xa19c (SPI_PS_INPUT_CNTL_11)
612// CHECK: 0xa19d (SPI_PS_INPUT_CNTL_12)
613// CHECK: 0xa19e (SPI_PS_INPUT_CNTL_13)
614// CHECK: 0xa19f (SPI_PS_INPUT_CNTL_14)
615// CHECK: 0xa1a0 (SPI_PS_INPUT_CNTL_15)
616// CHECK: 0xa1a1 (SPI_PS_INPUT_CNTL_16)
617// CHECK: 0xa1a2 (SPI_PS_INPUT_CNTL_17)
618// CHECK: 0xa1a3 (SPI_PS_INPUT_CNTL_18)
619// CHECK: 0xa1a4 (SPI_PS_INPUT_CNTL_19)
620// CHECK: 0xa1a5 (SPI_PS_INPUT_CNTL_20)
621// CHECK: 0xa1a6 (SPI_PS_INPUT_CNTL_21)
622// CHECK: 0xa1a7 (SPI_PS_INPUT_CNTL_22)
623// CHECK: 0xa1a8 (SPI_PS_INPUT_CNTL_23)
624// CHECK: 0xa1a9 (SPI_PS_INPUT_CNTL_24)
625// CHECK: 0xa1aa (SPI_PS_INPUT_CNTL_25)
626// CHECK: 0xa1ab (SPI_PS_INPUT_CNTL_26)
627// CHECK: 0xa1ac (SPI_PS_INPUT_CNTL_27)
628// CHECK: 0xa1ad (SPI_PS_INPUT_CNTL_28)
629// CHECK: 0xa1ae (SPI_PS_INPUT_CNTL_29)
630// CHECK: 0xa1af (SPI_PS_INPUT_CNTL_30)
631// CHECK: 0xa1b0 (SPI_PS_INPUT_CNTL_31)
632// CHECK: 0xa1b1 (SPI_VS_OUT_CONFIG)
633// CHECK: 0xa1b3 (SPI_PS_INPUT_ENA)
634// CHECK: 0xa1b4 (SPI_PS_INPUT_ADDR)
635// CHECK: 0xa1b5 (SPI_INTERP_CONTROL_0)
636// CHECK: 0xa1b6 (SPI_PS_IN_CONTROL)
637// CHECK: 0xa1b8 (SPI_BARYC_CNTL)
638// CHECK: 0xa1ba (SPI_TMPRING_SIZE)
639// CHECK: 0xa1c2 (SPI_SHADER_IDX_FORMAT)
640// CHECK: 0xa1c3 (SPI_SHADER_POS_FORMAT)
641// CHECK: 0xa1c4 (SPI_SHADER_Z_FORMAT)
642// CHECK: 0xa1c5 (SPI_SHADER_COL_FORMAT)
643// CHECK: 0xa1ff (GE_MAX_OUTPUT_PER_SUBGROUP)
644// CHECK: 0xa203 (DB_SHADER_CONTROL)
645// CHECK: 0xa204 (PA_CL_CLIP_CNTL)
646// CHECK: 0xa206 (PA_CL_VTE_CNTL)
647// CHECK: 0xa207 (PA_CL_VS_OUT_CNTL)
648// CHECK: 0xa210 (PA_STEREO_CNTL)
649// CHECK: 0xa286 (VGT_HOS_MAX_TESS_LEVEL)
650// CHECK: 0xa287 (VGT_HOS_MIN_TESS_LEVEL)
651// CHECK: 0xa290 (VGT_GS_MODE)
652// CHECK: 0xa291 (VGT_GS_ONCHIP_CNTL)
653// CHECK: 0xa293 (PA_SC_MODE_CNTL_1)
654// CHECK: 0xa297 (VGT_GS_PER_VS)
655// CHECK: 0xa298 (VGT_GSVS_RING_OFFSET_1)
656// CHECK: 0xa299 (VGT_GSVS_RING_OFFSET_2)
657// CHECK: 0xa29a (VGT_GSVS_RING_OFFSET_3)
658// CHECK: 0xa29b (VGT_GS_OUT_PRIM_TYPE)
659// CHECK: 0xa2a1 (VGT_PRIMITIVEID_EN)
660// CHECK: 0xa2a5 (VGT_GS_MAX_PRIMS_PER_SUBGROUP)
661// CHECK: 0xa2aa (IA_MULTI_VGT_PARAM)
662// CHECK: 0xa2ab (VGT_ESGS_RING_ITEMSIZE)
663// CHECK: 0xa2ac (VGT_GSVS_RING_ITEMSIZE)
664// CHECK: 0xa2ad (VGT_REUSE_OFF)
665// CHECK: 0xa2b5 (VGT_STRMOUT_VTX_STRIDE_0)
666// CHECK: 0xa2b9 (VGT_STRMOUT_VTX_STRIDE_1)
667// CHECK: 0xa2bd (VGT_STRMOUT_VTX_STRIDE_2)
668// CHECK: 0xa2c1 (VGT_STRMOUT_VTX_STRIDE_3)
669// CHECK: 0xa2ce (VGT_GS_MAX_VERT_OUT)
670// CHECK: 0xa2d3 (GE_NGG_SUBGRP_CNTL)
671// CHECK: 0xa2d5 (VGT_SHADER_STAGES_EN)
672// CHECK: 0xa2d6 (VGT_LS_HS_CONFIG)
673// CHECK: 0xa2d7 (VGT_GS_VERT_ITEMSIZE)
674// CHECK: 0xa2d8 (VGT_GS_VERT_ITEMSIZE_1)
675// CHECK: 0xa2d9 (VGT_GS_VERT_ITEMSIZE_2)
676// CHECK: 0xa2da (VGT_GS_VERT_ITEMSIZE_3)
677// CHECK: 0xa2db (VGT_TF_PARAM)
678// CHECK: 0xa2e4 (VGT_GS_INSTANCE_CNT)
679// CHECK: 0xa2e5 (VGT_STRMOUT_CONFIG)
680// CHECK: 0xa2e6 (VGT_STRMOUT_BUFFER_CONFIG)
681// CHECK: 0xa2f8 (PA_SC_AA_CONFIG)
682// CHECK: 0xa2f9 (PA_SU_VTX_CNTL)
683// CHECK: 0xa310 (PA_SC_SHADER_CONTROL)
684// CHECK: 0xa313 (PA_SC_CONSERVATIVE_RASTERIZATION_CNTL)
685// CHECK: 0xa316 (VGT_VERTEX_REUSE_BLOCK_CNTL)
686// CHECK: 0xc258 (IA_MULTI_VGT_PARAM_PIPED)
687// CHECK: 0xc25f (GE_STEREO_CNTL)
688// CHECK: 0xc262 (GE_USER_VGPR_EN)
689