xref: /llvm-project/llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp16_err.s (revision a888f5e4d7d979617a47262a875f5433ee161074)
1// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 %s 2>&1 | FileCheck --check-prefix=GFX12 --implicit-check-not=error: %s
2
3// check for error with sgpr or imm operands
4
5v_dot4_f32_fp8_bf8 v0, s0, v2, v3 quad_perm:[3,2,1,0]
6// GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
7
8v_dot4_f32_fp8_bf8 v0, v1, s0, v3 row_shr:15 row_mask:0x1 bank_mask:0x1 bound_ctrl:1 fi:1
9// GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
10
11v_dot4_f32_bf8_fp8 v0, v1, v2, s0 row_shl:15
12// GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
13
14v_dot4_f32_bf8_fp8 v0, 1.0, v2, v3 row_ror:15 row_mask:0x1 bank_mask:0x1 bound_ctrl:1 fi:1
15// GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
16
17v_dot4_f32_fp8_fp8 v0, v1, 1.0, v3 row_mirror
18// GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
19
20v_dot4_f32_fp8_fp8 v0, v1, v2, 1.0 row_half_mirror row_mask:0x1 bank_mask:0x1 bound_ctrl:1 fi:1
21// GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
22
23v_dot4_f32_bf8_bf8 v0, v1, v2, 1 row_share:15
24// GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
25