1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s 2 3// --------------------------------------------------------------------------// 4// Immediate out of upper bound [-8, 7]. 5 6st1h z29.h, p5, [x7, #-9, MUL VL] 7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 8// CHECK-NEXT: st1h z29.h, p5, [x7, #-9, MUL VL] 9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 10 11st1h z29.h, p5, [x4, #8, MUL VL] 12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 13// CHECK-NEXT: st1h z29.h, p5, [x4, #8, MUL VL] 14// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 15 16st1h z21.s, p2, [x1, #-9, MUL VL] 17// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 18// CHECK-NEXT: st1h z21.s, p2, [x1, #-9, MUL VL] 19// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 20 21st1h z17.s, p5, [x1, #8, MUL VL] 22// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 23// CHECK-NEXT: st1h z17.s, p5, [x1, #8, MUL VL] 24// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 25 26st1h z0.d, p1, [x14, #-9, MUL VL] 27// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 28// CHECK-NEXT: st1h z0.d, p1, [x14, #-9, MUL VL] 29// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 30 31st1h z24.d, p3, [x16, #8, MUL VL] 32// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 33// CHECK-NEXT: st1h z24.d, p3, [x16, #8, MUL VL] 34// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 35 36// --------------------------------------------------------------------------// 37// Invalid predicate 38 39st1h z15.h, p8, [x0, #8, MUL VL] 40// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 41// CHECK-NEXT: st1h z15.h, p8, [x0, #8, MUL VL] 42// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 43 44st1h z17.s, p8, [x20, #2, MUL VL] 45// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 46// CHECK-NEXT: st1h z17.s, p8, [x20, #2, MUL VL] 47// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 48 49st1h z15.d, p8, [x0, #8, MUL VL] 50// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 51// CHECK-NEXT: st1h z15.d, p8, [x0, #8, MUL VL] 52// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 53 54st1h z15.d, p7.b, [x0, #8, MUL VL] 55// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 56// CHECK-NEXT: st1h z15.d, p7.b, [x0, #8, MUL VL] 57// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 58 59st1h z15.d, p7.b, [x0, #8, MUL VL] 60// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 61// CHECK-NEXT: st1h z15.d, p7.b, [x0, #8, MUL VL] 62// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 63 64// --------------------------------------------------------------------------// 65// Invalid vector list 66 67st1h { }, p0, [x0] 68// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected 69// CHECK-NEXT: st1h { }, p0, [x0] 70// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 71 72st1h { z1.h, z2.h }, p0, [x0] 73// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 74// CHECK-NEXT: st1h { z1.h, z2.h }, p0, [x0] 75// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 76 77st1h { v0.8h }, p0, [x0] 78// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 79// CHECK-NEXT: st1h { v0.8h }, p0, [x0] 80// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 81 82 83// --------------------------------------------------------------------------// 84// Invalid scalar + scalar addressing modes 85 86st1h z0.h, p0, [x0, x0] 87// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1' 88// CHECK-NEXT: st1h z0.h, p0, [x0, x0] 89// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 90 91st1h z0.h, p0, [x0, xzr] 92// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1' 93// CHECK-NEXT: st1h z0.h, p0, [x0, xzr] 94// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 95 96st1h z0.h, p0, [x0, x0, lsl #2] 97// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1' 98// CHECK-NEXT: st1h z0.h, p0, [x0, x0, lsl #2] 99// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 100 101st1h z0.h, p0, [x0, w0] 102// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1' 103// CHECK-NEXT: st1h z0.h, p0, [x0, w0] 104// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 105 106st1h z0.h, p0, [x0, w0, uxtw] 107// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1' 108// CHECK-NEXT: st1h z0.h, p0, [x0, w0, uxtw] 109// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 110 111 112// --------------------------------------------------------------------------// 113// Invalid scalar + vector addressing modes 114 115st1h z0.d, p0, [x0, z0.h] 116// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 117// CHECK-NEXT: st1h z0.d, p0, [x0, z0.h] 118// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 119 120st1h z0.d, p0, [x0, z0.s] 121// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 122// CHECK-NEXT: st1h z0.d, p0, [x0, z0.s] 123// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 124 125st1h z0.s, p0, [x0, z0.s] 126// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)' 127// CHECK-NEXT: st1h z0.s, p0, [x0, z0.s] 128// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 129 130st1h z0.s, p0, [x0, z0.s, uxtw #2] 131// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #1' 132// CHECK-NEXT: st1h z0.s, p0, [x0, z0.s, uxtw #2] 133// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 134 135st1h z0.s, p0, [x0, z0.s, lsl #1] 136// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #1' 137// CHECK-NEXT: st1h z0.s, p0, [x0, z0.s, lsl #1] 138// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 139 140st1h z0.d, p0, [x0, z0.d, lsl #2] 141// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #1' 142// CHECK-NEXT: st1h z0.d, p0, [x0, z0.d, lsl #2] 143// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 144 145st1h z0.d, p0, [x0, z0.d, sxtw #2] 146// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #1' 147// CHECK-NEXT: st1h z0.d, p0, [x0, z0.d, sxtw #2] 148// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 149 150// --------------------------------------------------------------------------// 151// Invalid vector + immediate addressing modes 152 153st1h z0.s, p0, [z0.s, #-1] 154// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 155// CHECK-NEXT: st1h z0.s, p0, [z0.s, #-1] 156// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 157 158st1h z0.s, p0, [z0.s, #-2] 159// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 160// CHECK-NEXT: st1h z0.s, p0, [z0.s, #-2] 161// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 162 163st1h z0.s, p0, [z0.s, #63] 164// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 165// CHECK-NEXT: st1h z0.s, p0, [z0.s, #63] 166// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 167 168st1h z0.s, p0, [z0.s, #64] 169// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 170// CHECK-NEXT: st1h z0.s, p0, [z0.s, #64] 171// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 172 173st1h z0.s, p0, [z0.s, #3] 174// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 175// CHECK-NEXT: st1h z0.s, p0, [z0.s, #3] 176// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 177 178st1h z0.d, p0, [z0.d, #-1] 179// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 180// CHECK-NEXT: st1h z0.d, p0, [z0.d, #-1] 181// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 182 183st1h z0.d, p0, [z0.d, #-2] 184// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 185// CHECK-NEXT: st1h z0.d, p0, [z0.d, #-2] 186// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 187 188st1h z0.d, p0, [z0.d, #63] 189// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 190// CHECK-NEXT: st1h z0.d, p0, [z0.d, #63] 191// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 192 193st1h z0.d, p0, [z0.d, #64] 194// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 195// CHECK-NEXT: st1h z0.d, p0, [z0.d, #64] 196// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 197 198st1h z0.d, p0, [z0.d, #3] 199// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 200// CHECK-NEXT: st1h z0.d, p0, [z0.d, #3] 201// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 202 203 204// --------------------------------------------------------------------------// 205// Negative tests for instructions that are incompatible with movprfx 206 207movprfx z31.d, p7/z, z6.d 208st1h { z31.d }, p7, [z31.d, #62] 209// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 210// CHECK-NEXT: st1h { z31.d }, p7, [z31.d, #62] 211// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 212 213movprfx z31, z6 214st1h { z31.d }, p7, [z31.d, #62] 215// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 216// CHECK-NEXT: st1h { z31.d }, p7, [z31.d, #62] 217// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 218