1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s 2 3// ------------------------------------------------------------------------- // 4// Tied operands must match 5 6splice z0.b, p0, z1.b, z2.b 7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register 8// CHECK-NEXT: splice z0.b, p0, z1.b, z2.b 9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 10 11 12// ------------------------------------------------------------------------- // 13// Invalid element widths. 14 15splice z0.b, p0, z0.b, z2.h 16// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 17// CHECK-NEXT: splice z0.b, p0, z0.b, z2.h 18// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 19 20 21// ------------------------------------------------------------------------- // 22// Invalid predicate 23 24splice z0.b, p8, z0.b, z1.b 25// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 26// CHECK-NEXT: splice z0.b, p8, z0.b, z1.b 27// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 28 29splice z0.b, p7.b, z0.b, z1.b 30// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 31// CHECK-NEXT: splice z0.b, p7.b, z0.b, z1.b 32// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 33 34splice z0.b, p7.q, z0.b, z1.b 35// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 36// CHECK-NEXT: splice z0.b, p7.q, z0.b, z1.b 37// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 38 39 40// --------------------------------------------------------------------------// 41// Negative tests for instructions that are incompatible with movprfx 42 43movprfx z4.d, p7/z, z6.d 44splice z4.d, p7, z4.d, z31.d 45// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx 46// CHECK-NEXT: splice z4.d, p7, z4.d, z31.d 47// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 48