1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s 2 3// --------------------------------------------------------------------------// 4// Invalid operand (.s) 5 6ldff1sw z12.s, p7/z, [x0] 7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 8// CHECK-NEXT: ldff1sw z12.s, p7/z, [x0] 9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 10 11// --------------------------------------------------------------------------// 12// restricted predicate has range [0, 7]. 13 14ldff1sw z4.d, p8/z, [x0] 15// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 16// CHECK-NEXT: ldff1sw z4.d, p8/z, [x0] 17// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 18 19// --------------------------------------------------------------------------// 20// Invalid scalar + scalar addressing modes 21 22ldff1sw z0.d, p0/z, [x0, sp] 23// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, with required shift 'lsl #2' 24// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, sp] 25// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 26 27ldff1sw z0.d, p0/z, [x0, x0, lsl #3] 28// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, with required shift 'lsl #2' 29// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, x0, lsl #3] 30// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 31 32ldff1sw z0.d, p0/z, [x0, w0] 33// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, with required shift 'lsl #2' 34// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, w0] 35// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 36 37ldff1sw z0.d, p0/z, [x0, w0, uxtw] 38// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, with required shift 'lsl #2' 39// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, w0, uxtw] 40// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 41 42 43// --------------------------------------------------------------------------// 44// Invalid scalar + vector addressing modes 45 46ldff1sw z0.d, p0/z, [x0, z0.h] 47// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 48// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.h] 49// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 50 51ldff1sw z0.d, p0/z, [x0, z0.s] 52// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 53// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.s] 54// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 55 56ldff1sw z0.d, p0/z, [x0, z0.d, uxtw #3] 57// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2' 58// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.d, uxtw #3] 59// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 60 61ldff1sw z0.d, p0/z, [x0, z0.d, lsl #3] 62// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2' 63// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.d, lsl #3] 64// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 65 66ldff1sw z0.d, p0/z, [x0, z0.d, lsl] 67// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected #imm after shift specifier 68// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.d, lsl] 69// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 70 71ldff1sw z0.d, p0/z, [x0, z0.d, lsl #3] 72// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2' 73// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.d, lsl #3] 74// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 75 76ldff1sw z0.d, p0/z, [x0, z0.d, sxtw #3] 77// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2' 78// CHECK-NEXT: ldff1sw z0.d, p0/z, [x0, z0.d, sxtw #3] 79// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 80 81 82// --------------------------------------------------------------------------// 83// Invalid vector + immediate addressing modes 84 85ldff1sw z0.s, p0/z, [z0.s] 86// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 87// CHECK-NEXT: ldff1sw z0.s, p0/z, [z0.s] 88// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 89 90ldff1sw z0.s, p0/z, [z0.s, #4] 91// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 92// CHECK-NEXT: ldff1sw z0.s, p0/z, [z0.s, #4] 93// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 94 95ldff1sw z0.d, p0/z, [z0.d, #-4] 96// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 97// CHECK-NEXT: ldff1sw z0.d, p0/z, [z0.d, #-4] 98// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 99 100ldff1sw z0.d, p0/z, [z0.d, #-1] 101// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 102// CHECK-NEXT: ldff1sw z0.d, p0/z, [z0.d, #-1] 103// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 104 105ldff1sw z0.d, p0/z, [z0.d, #125] 106// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 107// CHECK-NEXT: ldff1sw z0.d, p0/z, [z0.d, #125] 108// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 109 110ldff1sw z0.d, p0/z, [z0.d, #128] 111// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 112// CHECK-NEXT: ldff1sw z0.d, p0/z, [z0.d, #128] 113// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 114 115ldff1sw z0.d, p0/z, [z0.d, #3] 116// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. 117// CHECK-NEXT: ldff1sw z0.d, p0/z, [z0.d, #3] 118// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 119 120 121// --------------------------------------------------------------------------// 122// Negative tests for instructions that are incompatible with movprfx 123 124movprfx z0.d, p0/z, z7.d 125ldff1sw { z0.d }, p0/z, [z0.d] 126// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 127// CHECK-NEXT: ldff1sw { z0.d }, p0/z, [z0.d] 128// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 129 130movprfx z0, z7 131ldff1sw { z0.d }, p0/z, [z0.d] 132// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 133// CHECK-NEXT: ldff1sw { z0.d }, p0/z, [z0.d] 134// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 135